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AT90SC9608RT Datasheet(PDF) 2 Page - ATMEL Corporation |
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AT90SC9608RT Datasheet(HTML) 2 Page - ATMEL Corporation |
2 / 3 page 2 AT90SC9608RT 6554AS–SPD–15May07 Development Tools • Voyager Emulation Platform (ATV4) to Support Software Development • IAR Embedded Workbench® V3.20 Debugger or Atmel’s AVR Studio® Version 4.07 or Above • Software Libraries and Application Notes Description The AT90SC9608RT is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory and EEPROM data memory, based on the secureAVR RISC architecture. By executing powerful instructions in a single clock cycle, the AT90SC9608RT achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruc- tion executed in one clock cycle. The AT90SC9608RT uses the secureAVR that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features. The AT90SC9608RT includes 8K bytes of Atmel’s high density, non volatile memory. Additional security features include power and frequency protection logic, logical scrambling on program data and addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode. Figure 1 shows the AT90SC9608RT secureAVR RISC Architecture. Figure 1. AT90SC9608RT secureAVR RISC Architecture Instruction Decoder Program Memory Instruction Register Access Control General Purpose Registers X Y Z Status Register RAM Data Memory Interrupt Unit ISO 7816 I/O Port 0 Timer Control Lines ALU EEPROM User Memory OTP PC Secure Control VCC GND CLK Access Control IN/OUT0 Data Bus 8-bit RNG 16 16 16 8 88 DES DPA Counter measures Reset Circuit RST ISO 7816 Controller CRCand Checksum Accelerator |
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