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ATF1502ASV-15JU44 Datasheet(PDF) 1 Page - ATMEL Corporation |
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ATF1502ASV-15JU44 Datasheet(HTML) 1 Page - ATMEL Corporation |
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1 / 25 page  Features • High-density, High-performance, Electrically-erasable Complex Programmable Logic Device – 3.0 to 3.6V Operating Range – 32 Macrocells – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell – 44 Pins – 15 ns Maximum Pin-to-pin Delay – Registered Operation up to 77 MHz – Enhanced Routing Resources • In-System Programmability (ISP) via JTAG • Flexible Logic Macrocell – D/T Latch Configurable Flip-flops – Global and Individual Register Control Signals – Global and Individual Output Enable – Programmable Output Slew Rate – Programmable Output Open Collector Option – Maximum Logic Utilization by Burying a Register with a COM Output • Advanced Power Management Features – Pin-controlled 0.75 mA Standby Mode – Programmable Pin-keeper Inputs and I/Os – Reduced-power Feature per Macrocell • Available in Commercial and Industrial Temperature Ranges • Available in 44-lead PLCC and TQFP • Advanced EEPROM Technology – 100% Tested – Completely Reprogrammable – 10,000 Program/Erase Cycles – 20-year Data Retention – 2000V ESD Protection – 200 mA Latch-up Immunity • JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported • PCI-compliant • Security Fuse Feature • Green (Pb/Halide-fee/RoHS Compliant) Package Options Enhanced Features • Improved Connectivity (Additional Feedback Routing, Alternate Input Routing) • Output Enable Product Terms • D Latch Mode • Combinatorial Output with Registered Feedback within Any Macrocell • Three Global Clock Pins • Fast Registered Input from Product Term • Programmable “Pin-keeper” Option • V CC Power-up Reset Option • Pull-up Option on JTAG Pins TMS and TDI • Advanced Power Management Features – Individual Macrocell Power Option High- performance EEPROM CPLD ATF1502ASV 1615J–PLD–01/06 |
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