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ATF1502BE-7AU44 Datasheet(PDF) 11 Page - ATMEL Corporation |
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ATF1502BE-7AU44 Datasheet(HTML) 11 Page - ATMEL Corporation |
11 / 24 page 11 3492A–PLD–12/05 ATF1502BE Figure 6-1. BSC Configuration for Input and I/O Pins (Except JTAG TAP Pins) Note: The ATF1502BE has a pull-up option on TMS and TDI pins. This feature is selected as a design option. Figure 6-2. BSC Configuration for Macrocell 7. Design Software Support ATF1502BE designs are supported by several third-party tools. Automated fitters allow logic synthesis using a variety of high-level description languages such as VHDL ® and Verilog®. Third party synthesis and simulation tools from Mentor Graphics ® are integrated into Atmel’s software tools. 0 1 0 1 DQ DQ Capture DR Update DR 0 1 0 1 DQ DQ TDI OUTJ OEJ Shift Clock Mode TDO BSC for I/O Pins and Macrocells 0 1 D Q TDI CLOCK TDO Pin |
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