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AT49BV040B-TU Datasheet(PDF) 6 Page - ATMEL Corporation |
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AT49BV040B-TU Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 21 page 6 3499B–FLASH–4/06 AT49BV040B Figure 4-1. Data Polling Algorithm Figure 4-2. Toggle Bit Algorithm Notes: 1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. I/O7 should be rechecked even if I/O5 = “1” because I/O7 may change simultaneously with I/O5. Note: 1. The system should recheck the toggle bit even if I/O5 = “1” because the toggle bit may stop toggling as I/O5 changes to “1”. START Read I/O7 - I/O0 Addr = VA I/O7 = Data? I/O5 = 1? Read I/O7 - I/O0 Addr = VA I/O7 = Data? Program/Erase Operation Not Successful, Write Product ID Exit Command NO NO NO YES YES YES Program/Erase Operation Successful, Device in Read Mode START Read I/O7 - I/O0 Read I/O7 - I/O0 Toggle Bit = Toggle? I/O5 = 1? Read I/O7 - I/O0 Twice Toggle Bit = Toggle? Program/Erase Operation Not Successful, Write Product ID Exit Command Program/Erase Operation Successful, Device in Read Mode NO NO NO YES YES YES |
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