10

FN6538.2

December 2, 2008

4ms during the sampling; that could discharge a pre-biased

output. Therefore, to avoid that case, but still come close to

disabling OCP, a resistor (>60k

Ω) is recommended.

Note that conditions during power-up may look different than

normal operation. For example, during power-up in a 12V

system, the IC starts operation just above 4V; if the supply

ramp is slow, the soft-start ramp might be over well before

12V is reached. So with lower gate drive voltages, the

effectively lowering the OCP trip. In addition, the ripple

current will likely be different at lower input voltage.

Another factor is the digital nature of the soft-start ramp. On

each discrete voltage step, there is in effect a small load

transient and a current spike to charge the output capacitors.

The height of the current spike is not controlled; it is affected

by the step size of the output, the value of the output

capacitors, as well as the IC error amp compensation. So it

is possible to trip the overcurrent with in-rush current, in

addition to the normal load and ripple considerations.

OCP is always enabled during soft-start, so there is

protection starting up into a shorted load.

Undervoltage Protection

The output is protected against undervoltage conditions by

monitoring the VOS pin. An external resistor divider (similar

ratio to the one on the FB pin) makes the voltage equal the

0.8V internal reference under normal operation. If the output

goes too low (25% below 0.8V = 0.6V nominal on VOS), the

output will latch off, with UGATE and LGATE both forced low.

(toggling COMP/EN will NOT restart it). The UV protection is

not enabled until the end of the soft-start ramp (as shown in

Figure 2).

down to the 75% point; both gate drivers stop switching, and

load, at a rate determine by the conditions, and the output

components.

The ISL6341C version does not have UVP; it relies on the

OCP for shorted loads. The PGOOD UV comparator is

separate, and is still active.

Overvoltage Protection

The output is protected against overvoltage conditions by

monitoring the VOS pin, similar to undervoltage. If the output

goes too high (25% above 0.8V = 1.0V nominal on VOS), the

output will latch off. As shown in Figure 8, UGATE will be

forced low, but LGATE will be forced high (to try to pull-down

the output) until the output drops to 1/2 of the normal voltage

(50% of 0.8V = 0.4V nominal on VOS). The LGATE will then

shut off, but will keep turning back on whenever the output

goes too high again.

up) to restart (toggling COMP/EN will NOT restart it). The OV

exceeded. The OV protection is active during soft-start at the

fixed 25% above the final expected voltage. The OVP is not

gated off by tripping OCP (but the UVP is gated off if OCP

trips first).

If the VOS pin is disconnected, a small bias current on-chip

will force an overvoltage condition.

FIGURE 7. UNDERVOLTAGE PROTECTION

UGATE (24V/DIV)

GND>

LGATE (12V/DIV)

GND>

GND>

75%

FIGURE 8. OVERVOLTAGE PROTECTION

UGATE (24V/DIV)

GND>

LGATE (12V/DIV)

GND>

GND>

125%

50%

ISL6341, ISL6341A, ISL6341B, ISL6341C