Rev. 4265C–AERO–05/05

1

Features

Programs for Field Programmable Gate Arrays (FPGAs)

– Data Retention: 10 Years

– 20 krads (Si) Read-only mode when Biased

– 60 krads (Si) Read-only mode when Unbiased

Description

The AT17LV010-10DP is a FPGA Configuration Serial EEPROM provides an easy-to-

use, cost-effective configuration memory for Field Programmable Gate Arrays. It is

packaged in the 28-pin 400 mils wide FP package. Configurator uses a simple serial-

access procedure to configure one or more FPGA devices. The user can select the

polarity of the reset function by programming four EEPROM bytes. The device also

supports a write-protection mechanism within its programming mode.

Space FPGA

Configuration

EEPROM

AT17LV010-

10DP

Rev. 4265C–AERO–05/05