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ATA555814-DBB Datasheet(PDF) 4 Page - ATMEL Corporation

Part # ATA555814-DBB
Description  1 kbit R/W IDIC with Deterministic Anticollision
Download  48 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATA555814-DBB Datasheet(HTML) 4 Page - ATMEL Corporation

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4
4681D–RFID–08/08
ATA5558
Figure 2-2.
Bi-phase Timing Diagram
2.5
Binary Bit Rate Generator
The tag’s data rate is binary programmable in the configuration register to operate at any bit rate
between RF/2 and RF/64.
2.6
Memory Section
2.6.1
Memory Map
The physical memory is subdivided into two logical sections (see Figure 2-3). The first logical
memory section contains the 1024 bits of user data. The second logical memory section con-
tains 320 bits of system/configuration data. Both memories are organized in 32-bit data blocks,
each block being equipped with a single lock bit, with which the associated block can be write
protected. Command controlled programming and reading always takes place on a serial MSB
first block basis so that a block constitutes the smallest directly accessible data unit. The user
memory is further subdivided into 8 pages, each of 4 blocks in size. This provides the basis of
the page security scheme (“Password Protection” on page 6).
Figure 2-3.
Memory Map Structure
1
Data rate = FRF/8
0
NRZ data stream
Biphase coded
RF field
Bi-phase coded
Modulator signal
01
110
1
Data rate
RF
2n
1
+
()
---------------------
=
31
:
4
3
2
1
0
30
29
7
6
5
28
27
31
36h
37h
3Eh
3Fh
3Dh
3Ch
3Bh
3Ah
39h
38h
1Eh
1Fh
1Dh
1Ch
00h
01h
03h
02h
1Bh
04h
05h
06h
07h
L
L
L
L
L
L
L
L
Configuration
Password/Page Security
Traceability 3
Traceability 2
Traceability 1
Tag ID 3
Tag ID 2
Tag ID 1
System memory
User memory
L
62
63
61
60
59
58
57
56
55
54
L
Password - Write
Password - Read
31 30 29
0
1
2
30 29
0
1
2
31
bit position
bit position
User data block0/page0
User data block1/page0
User data block2/page0
User data block3/page0
User data block4/page1
User data block5/page1
User data block6/page1
User data block7/page1
User data block31/page7
User data block30/page7
User data block29/page7
:
L
L
L
L
L
L
:
L
L
L
L
L
User data block28/page7
User data block27/page6
L
L
L
L
Lock bits


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