9

4530G–BCD–09/05

T6818/ATA6828

3.6

Thermal shutdown

hysteresis

∆T

j switch off

15

° CB

3.7

Ratio thermal shutdown

off/thermal prewarning

set

T

jPW set

1.05

1.2

B

3.8

Ratio thermal shutdown

on/thermal prewarning

reset

T

j switch on/

1.05

1.2

B

4

Output Specification (OUT1-OUT3)

4.1

On resistance

I

2, 12,

13

R

DSOn1-3

1.1

Ω

A

4.2

I

2, 12,

13

R

DSOn1-3

1.1

Ω

A

4.3

High-side output

leakage current

V

output stages off

2, 12,

13

–15

µA

A

4.4

Low-side output

leakage current

V

output stages off

2, 12,

13

I

Out1-3

200

µA

A

4.5

High-side switch

reverse diode forward

voltage

I

2, 12,

13

V

1.5

V

A

4.6

Low-side switch reverse

diode forward voltage

I

2, 12,

13

V

Out 1-3

–1.5

V

A

4.7

High-side overcurrent

limitation and shutdown

threshold

2, 12,

13

I

Out1-3

–2.5

–2

–1.5

A

A

4.8

Low-side overcurrent

limitation and shutdown

threshold

2, 12,

13

1.5

2

2.5

A

A

4.9

Overcurrent shutdown

delay time

10

40

µs

A

4.10

High-side open-load

detection threshold

2, 12,

13

I

Out1-3

–45

–30

–15

mA

A

4.11

Low-side open-load

detection threshold

2, 12,

13

15

30

45

mA

A

4.12

Open-load detection

delay time

200

600

µs

A

4.13

High-side output switch

t

don

20

µs

A

4.14

Low-side output switch

R

20

µs

A

4.15

High-side output switch

V

t

doff

20

µs

A

8.

Electrical Characteristics (Continued)

No.

Parameters

Test Conditions

Pin

Symbol

Min.

Typ.

Max.

Unit

Type*

*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter

Note:

1. Delay time between rising edge of input signal at pin CS after data transmission and switch on output stages to 90% of final

level. Device not in standby for t > 1 ms