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VND5N07 Datasheet(PDF) 4 Page - STMicroelectronics |
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VND5N07 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 15 page  VND5N07/VND5N07-1/VNP5N07FI/K5N07FM 4/15 ELECTRICAL CHARACTERISTICS (cont’d) Table 9. Source Drain Diode Note: 4. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 5. Parameters guaranteed by design/characterization. Table 10. Protection Note: 6. Parameters guaranteed by design/characterization. PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: – OVERVOLTAGE CLAMP PROTECTION: internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. – LINEAR CURRENT LIMITER CIRCUIT: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. – OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150°C. The device is automatically restarted when the chip temperature falls below 135°C. – STATUS FEEDBACK: In the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). Symbol Parameter Test Conditions Min. Typ. Max. Unit VSD (4) Forward On Voltage ISD = 2.5 A; Vin = 0 1.6 V trr (5) Reverse Recovery Time ISD = 2.5 A; di/dt = 100 A/µs VDD = 30 V; Tj = 25 °C (see test circuit, Figure 30) 150 ns Qrr (5) Reverse Recovery Charge 0.3 µC IRRM (5) Reverse Recovery Current 5.7 A Symbol Parameter Test Conditions Min. Typ. Max. Unit Ilim Drain Current Limit Vin = 10 V; VDS = 13 V Vin = 5 V; VDS = 13 V 3.5 3.5 5 5 7 7 A A tdlim (6) Step Response Current Limit Vin = 10 V Vin = 5 V 15 40 20 60 µs µs Tjsh (6) Overtemperature Shutdown 150 °C Tjrs (6) Overtemperature Reset 135 °C Igf (6) Fault Sink Current Vin = 10 V; VDS = 13 V Vin = 5 V; VDS = 13 V 50 20 mA mA Eas (6) Single Pulse Avalanche Energy starting Tj = 25 °C; VDD = 20 V Vin = 10 V; Rgen = 1 KΩ; L = 10 mH 0.2 J |
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