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2

XE1205

TABLE OF CONTENTS

1

Non-conformance ........................................................................................................................................................ 3

2

Functional Block Diagram........................................................................................................................................... 3

3

Pin description............................................................................................................................................................. 4

4

Electrical Characteristics ............................................................................................................................................ 5

4.1

Absolute Maximum Operating Ranges .......................................................................................................................... 5

4.2

Specifications................................................................................................................................................................. 5

4.2.1

Operating Range ........................................................................................................................................................... 5

4.2.2

Electrical Specifications ................................................................................................................................................. 5

5

Description ................................................................................................................................................................... 7

5.1

Data Operation Modes................................................................................................................................................... 7

5.2

Receiver section ............................................................................................................................................................ 8

5.2.1

LNA & Receiver modes ................................................................................................................................................. 8

5.2.2

Interrupt signal mapping ................................................................................................................................................ 8

5.2.3

Receiver in continuous mode......................................................................................................................................... 8

5.2.4

DATA pin in bidirectional or unidirectional mode (continuous mode only) ................................................................... 14

5.2.5

Receiver in buffered mode........................................................................................................................................... 14

5.2.6

Additional narrowband filter bandwidths ...................................................................................................................... 17

5.3

Transmitter section ...................................................................................................................................................... 18

5.3.1

Output power ............................................................................................................................................................... 18

5.3.2

Transmitter in continuous mode................................................................................................................................... 18

5.3.3

Transmitter in buffered mode....................................................................................................................................... 20

5.4

Frequency synthesizer................................................................................................................................................. 21

5.4.1

Clock Output for an external processor ....................................................................................................................... 21

6

Highest Bit RATES: example of 304.7 kbit/s operation .......................................................................................... 22

6.1

Registers settings ........................................................................................................................................................ 22

6.1.1

Bitrate (BR) and frequency deviation (fdev)................................................................................................................. 22

6.1.2

Rx filter ........................................................................................................................................................................ 22

6.1.3

Tx filter......................................................................................................................................................................... 22

6.2

Hardware settings........................................................................................................................................................ 23

6.3

Operation..................................................................................................................................................................... 23

6.4

Typical performance .................................................................................................................................................... 23

7

Serial interface definition and principle of operation ............................................................................................. 24

7.1

Serial Control Interface ................................................................................................................................................ 24

7.1.1

Chip configuration via SPI_CONFIG interface............................................................................................................. 25

7.1.2

Data transmission and reception via SPI_DATA interface........................................................................................... 26

7.2

Configuration and status registers ............................................................................................................................... 28

7.2.1

Configuration register: general description .................................................................................................................. 28

7.2.2

MCParam configuration register (main configuration parameters)............................................................................... 29

7.2.3

IRQParam configuration register (IRQ parameters)..................................................................................................... 30

7.2.4

TXParam configuration register (transmitter configuration parameters) ...................................................................... 31

7.2.5

RXParam configuration register (receiver configuration parameters) .......................................................................... 31

7.2.6

Pattern register ............................................................................................................................................................ 33

7.2.7

OSCParam configuration register (oscillator parameters) ........................................................................................... 34

7.2.8

ADParam configuration register (additional settings)................................................................................................... 35

7.3

Operating Modes ......................................................................................................................................................... 36

7.3.1

XE1205 switching time using SPI_CONFIG interface.................................................................................................. 36

7.3.2

XE1205 switching time using SW(1:0) pins. ................................................................................................................ 38

7.4

Selection of the reference frequency ........................................................................................................................... 38

7.5

Clock output interface .................................................................................................................................................. 39

7.6

Default settings at power-up ........................................................................................................................................ 39

7.7

Pad configuration versus chip modes .......................................................................................................................... 40

8

Application information ............................................................................................................................................ 41

8.1

Matching network of the receiver ................................................................................................................................. 41

8.2

Matching network of the transmitter............................................................................................................................. 41

8.3

VCO tank ..................................................................................................................................................................... 44

8.4

Loop filter of the frequency synthesizer ....................................................................................................................... 45

8.5

Reference crystal for the frequency synthesizer .......................................................................................................... 46

9

Packaging information .............................................................................................................................................. 47