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ATA5760 Datasheet(PDF) 10 Page - ATMEL Corporation

Part # ATA5760
Description  UHF ASK/FSK Receiver
Download  41 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATA5760 Datasheet(HTML) 10 Page - ATMEL Corporation

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10
4896D–RKE–08/08
ATA5760/ATA5761
8.
Polling Mode
According to Figure 8-4 on page 13, the receiver stays in polling mode in a continuous cycle of
three different modes. In sleep mode the signal processing circuitry is disabled for the time
period T
Sleep while consuming low current of IS =ISoff. During the start-up period, TStartup, all sig-
nal processing circuits are enabled and settled. In the following bit-check mode, the incoming
data stream is analyzed bit by bit contra a valid transmitter signal. If no valid signal is present,
the receiver is set back to sleep mode after the period T
Bit-check. This period varies check by
check as it is a statistical process. An average value for T
Bit-check is given in the electrical charac-
teristics. During T
Startup and TBit-check the current consumption is IS =ISon. The condition of the
receiver is indicated on pin IC_ACTIVE. The average current consumption in polling mode is
dependent on the duty cycle of the active mode and can be calculated as:
During T
Sleep and TStartup the receiver is not sensitive to a transmitter signal. To guarantee the
reception of a transmitted command the transmitter must start the telegram with an adequate
preburst. The required length of the preburst depends on the polling parameters T
Sleep, TStartup,
T
Bit-check and the start-up time of a connected microcontroller (TStart_microcontroller). Thus, TBit-check
depends on the actual bit rate and the number of bits (N
Bit-check) to be tested.
The following formula indicates how to calculate the preburst length.
T
Preburst ≥ TSleep + TStartup + TBit-check + TStart_microcontroller
8.1
Sleep Mode
The length of period T
Sleep is defined by the 5-bit word Sleep of the OPMODE register, the exten-
sion factor X
Sleep (according to Table 11-8 on page 25), and the basic clock cycle TClk. It is
calculated to be:
T
Sleep =Sleep × XSleep × 1024 × TClk
In US- and European applications, the maximum value of T
Sleep is about 60 ms if XSleep is set
to 1. The time resolution is about 2 ms in that case. The sleep time can be extended to almost
half a second by setting X
Sleep to 8. XSleep can be set to 8 by bit XSleepStd to’1’.
According to Table 11-7 on page 25, the highest register value of sleep sets the receiver into a
permanent sleep condition. The receiver remains in that condition until another value for Sleep is
programmed into the OPMODE register. This function is desirable where several devices share
a single data line and may also be used for microcontroller polling – via pin POLLING/_ON, the
receiver can be switched on and off.
Spoll
I
Soff
T
Sleep
I
Son
T
Startup
T
Bit-check
+
()
×
+
×
T
Sleep
T
Startup
T
Bit-check
++
----------------------------------------------------------------------------------------------------------------
=


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