9

4900B–RKE–11/07

ATA3742

R

full sensitivity to reduced sensitivity or vice versa at any time. In polling mode, the receiver will

not wake up if the RF input signal does not exceed the selected sensitivity. If the receiver is

already active, the data stream at pin DATA will disappear when the input signal is lower than

defined by the reduced sensitivity. Instead of the data stream, the pattern shown in Figure 4-3 is

issued at pin DATA to indicate that the receiver is still active.

Figure 4-3.

Steady L State Limited DATA Output Pattern

4.4

FSK/ASK Demodulator and Data Filter

The signal coming from the RSSI amplifier is converted into the raw data signal by the ASK/FSK

demodulator. The operating mode of the demodulator is set via pin ASK/FSK. Logic “L” sets the

demodulator to FSK mode; logic “H” sets it into ASK mode.

In ASK mode, an automatic threshold control circuit (ATC) is employed to set the detection refer-

ence voltage to a value where a good signal-to-noise ratio is achieved. This circuit also implies

the effective suppression of any kind of inband noise signals or competing transmitters. If the

SNR exceeds 10 dB, the data signal can be detected properly.

The FSK demodulator is intended to be used for an FSK deviation of

∆f ≥ 20 kHz. Lower values

may be used, but the sensitivity of the receiver will be reduced. The minimum usable deviation is

dependent on the selected baud rate. In FSK mode, only BR_Range0 and BR_Range1 are

available. In FSK mode, the data signal can be detected if the SNR exceeds 2 dB.

The output signal of the demodulator is filtered by the data filter before it is fed into the digital

signal processing circuit. The data filter improves the SNR as its pass band can be adopted to

the characteristics of the data signal. The data filter consists of a 1st-order high-pass and a

1st-order low-pass filter.

The high-pass filter cut-off frequency is defined by an external capacitor connected to pin

CDEM. The cut-off frequency of the high-pass filter is defined by the following formula:

In self-polling mode, the data filter must settle very rapidly to achieve a low current consumption.

Therefore, CDEM cannot be increased to very high values if self-polling is used. On the other

hand, CDEM must be large enough to meet the data filter requirements according to the data

signal. Recommended values for CDEM are given in “Electrical Characteristics” on page 26. The

values are slightly different for ASK and FSK mode.

The cut-off frequency of the low-pass filter is defined by the selected baud rate range

(BR_Range). BR_Range is defined in the OPMODE register (refer to Section “Configuration of

the Receiver” on page 20). BR_Range must be set in accordance to the used baud rate.

The ATA3742 is designed to operate with data coding where the DC level of the data signal is

50%. This is valid for Manchester and Bi-phase coding. If other modulation schemes are used,

the DC level should always remain within the range of V

sensitivity may be reduced by up to 1.5 dB in that condition.

DATA

f

cu_DF

1

2

π

×

30 k

Ω

×

CDEM

×

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=