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MSP430F2012TPW Datasheet(PDF) 8 Page - Texas Instruments |
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MSP430F2012TPW Datasheet(HTML) 8 Page - Texas Instruments |
8 / 88 page MSP430x20x1, MSP430x20x2, MSP430x20x3 MIXED SIGNAL MICROCONTROLLER SLAS491D -- AUGUST 2005 -- REVISED SEPTEMBER 2007 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions, MSP430x20x2 TERMINAL NAME PW, or N RSA I/O DESCRIPTION NAME NO. NO. I/O DESCRIPTION P1.0/TACLK/ACLK/A0 2 1 I/O General-purpose digital I/O pin Timer_A, clock signal TACLK input ACLK signal ouput ADC10 analog input A0 P1.1/TA0/A1 3 2 I/O General-purpose digital I/O pin Timer_A, capture: CCI0A input, compare: Out0 output ADC10 analog input A1 P1.2/TA1/A2 4 3 I/O General-purpose digital I/O pin Timer_A, capture: CCI1A input, compare: Out1 output ADC10 analog input A2 P1.3/ADC10CLK/ A3/VREF--/VeREF-- 5 4 I/O General-purpose digital I/O pin ADC10 conversion clock output ADC10 analog input A3 Input for negative external reference voltage/negative internal reference voltage output P1.4/SMCLK/A4/VREF+/VeREF+/ TCK 6 5 I/O General-purpose digital I/O pin SMCLK signal output ADC10 analog input A4 Input for positive external reference voltage/positive internal reference voltage output JTAG test clock, input terminal for device programming and test P1.5/TA0/A5/SCLK/TMS 7 6 I/O General-purpose digital I/O pin Timer_A, compare: Out0 output ADC10 analog input A5 USI: external clock input in SPI or I2C mode; clock output in SPI mode JTAG test mode select, input terminal for device programming and test P1.6/TA1/A6/SDO/SCL/TDI/TCLK 8 7 I/O General-purpose digital I/O pin Timer_A, capture: CCI1B input, compare: Out1 output ADC10 analog input A6 USI: Data output in SPI mode; I2C clock in I2C mode JTAG test data input or test clock input during programming and test P1.7/A7/SDI/SDA/TDO/TDI† 9 8 I/O General-purpose digital I/O pin ADC10 analog input A7 USI: Data input in SPI mode; I2C data in I2C mode JTAG test data output terminal or test data input during programming and test XIN/P2.6/TA1 13 12 I/O Input terminal of crystal oscillator General-purpose digital I/O pin Timer_A, compare: Out1 output XOUT/P2.7 12 11 I/O Output terminal of crystal oscillator General-purpose digital I/O pin RST/NMI/SBWTDIO 10 9 I Reset or nonmaskable interrupt input Spy-Bi-Wire test data input/output during programming and test TEST/SBWTCK 11 10 I Selects test mode for JTAG pins on Port1. The device protection fuse is connected to TEST. Spy-Bi-Wire test clock input during programming and test VCC 1 NA Supply voltage VSS 14 NA Ground reference † TDO or TDI is selected via JTAG instruction. NOTE: If XOUT/P2.7 is used as an input, excess current will flow until P2SEL.7 is cleared. This is due to the oscillator output driver connection to this pad after reset. |
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