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AT7912E Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT7912E Datasheet(HTML) 11 Page - ATMEL Corporation |
11 / 21 page 11 7743A–AERO–07/07 5. Operating Modes 5.1 Configuration of the AT7912E The AT7912E provides registers and ports for configuration. Each register contains exactly one byte (read / write), whereas a port (e.g. a FIFO interface) behaves like a FIFO, meaning that multiple data bytes can be read or written from/to the port. The ports of the AT7912E such as the FIFO, UART, ADC and RAM interfaces are accessed by a read/write command to the corresponding port address. In the case of FIFO, Host, UART and memory interfaces, a packet oriented access is also possible (meaning transferring multiple data bytes with a single command). The read/write selec- tion of a command is done by setting bit 7 (MSB) of the first byte to one (read) or zero (write). All internal registers are 8-bit wide addressable. Two simple commands, read and write, suffice to access all registers of the AT7912E. Configuration/Programming of the AT7912E internal registers is done via either a simple protocol over the SpaceWire link or STUP over the SpaceWire link or directly via the host interface. • The simple protocol over the SpaceWire, compatible with the T7906 (SCMCS116) link requires a command byte and, if necessary, one or more data bytes. The simple protocol ignores following bytes, if more bytes are sent. • The STUP over the SpaceWire link uses 4 bytes for commands. It also supports logical addressing. • The host interface provides a direct access to the internal registers through a 8-bit multiplexed address/data bus. After reset, the host interface is enabled. After a chip reset the AT7912E is configured via the internal controller. This can be either by receiving the configuration data from the SpaceWire link or by an external con- troller connected to the host port of the AT7912E. |
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