6

AT60142FT

7726A–AERO–07/07

Data Retention Mode

Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage

and supply current are guaranteed over temperature. The following rules insure data

retention:

1.

2.

Output Enable (OE) should be held high to keep the RAM outputs high imped-

ance, minimizing power dissipation.

3.

During power-up and power-down transitions CS and OE must be kept between

4.

voltages (3V).

Figure 1. Data Retention Timing

Data Retention Characteristics

Parameter

Description

Min

Max

Unit

2.0

–

–

V

Chip deselect to data

retention time

0.0

–

–

ns

Operation recovery

time

(1)

1.

–

–

ns

(2)

2.

Data retention current

–

0.700

1.5 (AT60142FT-15)

mA

1.3 (AT60142FT-17)