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ATXMEGA256A3B-AU Datasheet(PDF) 3 Page - ATMEL Corporation

Part # ATXMEGA256A3B-AU
Description  8/16-bit XMEGA A3B Microcontroller
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATXMEGA256A3B-AU Datasheet(HTML) 3 Page - ATMEL Corporation

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3
8116B–AVR–12/08
XMEGA A3B
3.
Overview
The XMEGA
A3V is a family of low power, high performance and peripheral rich CMOS 8/16-bit
microcontrollers based on the AVR® enhanced RISC architecture. By executing powerful
instructions in a single clock cycle, the XMEGA A3B achieves throughputs approaching 1 Million
Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power con-
sumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The XMEGA A3B devices provides the following features: In-System Programmable Flash with
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,
eight-channel Event System, Programmable Multi-level Interrupt Controller, 49 general purpose
I/O lines, 32-bit Real Time Counter (RTC) with Battery Backup System, seven flexible 16-bit
Timer/Counters with compare modes and PWM, six USARTs, two Two Wire Serial Interfaces
(TWIs), two Serial Peripheral Interfaces (SPIs), AES and DES crypto engine, two 8-channel, 12-
bit ADCs with optional differential input with programmable gain, one 2-channel 12-bit DAC, four
analog comparators with window mode, programmable Watchdog Timer with separate Internal
Oscillator, accurate internal oscillators with PLL and prescaler and programmable Brown-Out
Detection.
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,
is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this
can also be used for On-chip Debug and programming.
The XMEGA A3B devices have five software selectable power saving modes. The Idle mode
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and
all peripherals to continue functioning. The Power-down mode saves the SRAM and register
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,
allowing the application to maintain a timer base while the rest of the device is sleeping. In
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is
sleeping. This allows very fast start-up from external crystal combined with low power consump-
tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue
to run. To further reduce power consumption, the peripheral clock to each individual peripheral
can optionally be stopped in Active mode and Idle sleep mode.
The device is manufactured using Atmel's high-density nonvolatile memory technology. The pro-
gram Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader
running in the device can use any interface to download the application program to the Flash
memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-
cation Flash section is updated, providing true Read-While-Write operation. By combining an
8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A3B is a pow-
erful microcontroller family that provides a highly flexible and cost effective solution for many
embedded applications.


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