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SN65HVD1780P Datasheet(PDF) 2 Page - Texas Instruments |
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SN65HVD1780P Datasheet(HTML) 2 Page - Texas Instruments |
2 / 19 page R RE DE D V CC B A GND 1 2 3 4 8 7 6 5 S0299-02 1 2 3 4 6 7 A B R RE DE D Bus DEVICE INFORMATION SN65HVD1780 SN65HVD1781 SN65HVD1782 SLLS877E – DECEMBER 2007 – REVISED SEPTEMBER 2008 ...................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. D or P Package LOGIC DIAGRAM (POSITIVE LOGIC) (Top View) DRIVER FUNCTION TABLE Input Enable Outputs Driver State D DE A B H H H L Actively drive bus High L H L H Actively drive bus Low X L Z Z Driver disabled (1) X OPEN Z Z Driver disabled by default (1) OPEN H H L Actively drive bus High by default (1) When both the driver and receiver are disabled, the device enters a low-power standby mode. RECEIVER FUNCTION TABLE Differential Input Enable Output Receiver State VID = VA – VB RE R VIT+ < VID L H Receive valid bus High VIT– < VID < VIT+ L ? Indeterminate bus state VID < VIT– L L Receive valid bus Low X H Z Receiver disabled (1) X OPEN Z Receiver disabled by default (1) Open-circuit bus L H Fail-safe high output Short-circuit bus L H Fail-safe high output Idle (terminated) bus L H Fail-safe high output (1) When both the driver and receiver are disabled, the device enters a low-power standby mode. 2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD1780 SN65HVD1781 SN65HVD1782 |
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