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HV57908 Datasheet(PDF) 1 Page - Supertex, Inc |
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HV57908 Datasheet(HTML) 1 Page - Supertex, Inc |
1 / 5 page 1 HV57908 Device 80 Lead Quad 80 Lead Quad 80 Lead Quad Ceramic Gullwing Plastic Gullwing Ceramic Gullwing Die (MIL-STD-883 Processed*) HV57908 HV57908DG HV57908PG RBHV57908DG HV57908X *For Hi-Rel process flows, please refer to page 5-3 in the Databook. Ordering Information Package Options Absolute Maximum Ratings Supply voltage, VDD 1 -0.5V to +7.5V Output voltage, V PP -0.5V to +90V Logic input levels -0.3V to V DD +0.3V Ground current 2 1.5A Continuous total power dissipation 3 Plastic 1200mW Ceramic 1900mW Operating temperature range Plastic -40°C to 85°C Ceramic -55°C to 125°C Storage temperature range -65°C to +150°C Lead temperature 1.6mm (1/16 inch) from case for 10 seconds 260°C Notes: 1. All voltages are referenced to GND. 2. Limited by the total power dissipated in the package. 3. For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C for plastic and at 19mW/°C for ceramic. Features ❏ Processed with HVCMOS® technology ❏ 5V CMOS logic ❏ Output voltages up to 80V ❏ Low power level shifting ❏ 8MHz data rate ❏ Latched data outputs ❏ Forward and reverse shifting options (DIR pin) ❏ Diode to V PP allows efficient power recovery ❏ Outputs may be hot switched ❏ Hi-Rel processing available 8 MHz, 64-Channel Serial To Parallel Converter With Push-Pull Outputs General Description The HV579 is a low-voltage serial to high-voltage parallel con- verter with push-pull outputs. This device has been designed for use as a driver for electroluminescent displays. It can also be used in any application requiring multiple output high-voltage current sourcing and sinking capability such as driving plasma panels, vacuum fluorescent displays, or large matrix LCD displays. The device consists of a 64-bit shift register, 64 latches, and control logic to perform the polarity select and blanking of the outputs. HVout1 is connected to the first stage of the shift register through the polarity and blanking logic. Data is shifted through the shift registers on the logic low to high transition of the clock. The DIR pin causes CCW shifting when connected to GND, and CW shifting when connected to V DD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (HVOUT 64). Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift registers to the latches occurs when the LE (latch enable) input is high. The data in the latches is stored when LE is low. 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. |
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