TECHNICAL DATA

IW4023B

Triple 3-Input NAND Gate

High-Voltage Silicon-Gate CMOS

ORDERING INFORMATION

IW4023BN Plastic

IW4023BD SOIC

The IW4023B NAND gates provide the system designer with direct

emplementation of the NAND function.

• Operating Voltage Range: 3.0 to 18 V

• Maximum input current of 1 μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25

°C

• Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

LOGIC DIAGRAM

PIN 7 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Output

A

B

C

Y

L

X

X

H

X

L

X

H

X

X

L

H

H

H

H

L

X = don’t care

Rev. 00