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IW4023B Datasheet(PDF) 1 Page - IK Semicon Co., Ltd |
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IW4023B Datasheet(HTML) 1 Page - IK Semicon Co., Ltd |
1 / 5 page TECHNICAL DATA IW4023B Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS ORDERING INFORMATION IW4023BN Plastic IW4023BD SOIC TA = -55° to 125° C for all packages The IW4023B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25 °C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply LOGIC DIAGRAM PIN 14 =VCC PIN 7 = GND PIN ASSIGNMENT FUNCTION TABLE Inputs Output A B C Y L X X H X L X H X X L H H H H L X = don’t care Rev. 00 |
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