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LT3509IMSE-PBF Datasheet(PDF) 10 Page - Linear Technology |
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LT3509IMSE-PBF Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page  LT3509 10 3509f APPLICATIONS INFORMATION External Synchronization The external synchronization provides a trigger to the internal oscillator. As such, it can only raise the frequency above the free-run value. To allow for device and component tolerances, the free run frequency should be set to at least 12% lower than the lowest supplied external synchronization reference. The oscillator and hence the switching frequency can then pushed up from 12% above the free-run frequency, set by the selected RT. For example, if the minimum external clock is 300kHz, the RT should be chosen for 264KHz. The SYNC input has a threshold of 1.0V nominal so it is compatible with most logic levels. The duty cycle is not critical provided the high or low pulse width is at least 80ns. Design Procedure Before starting detailed design a number of key design parameters should be established as these may affect design decisions and component choices along the way. One of the main things to determine apart from the desired output voltages is the input voltage range. Both the normal operating range and the extreme conditions of surges and/or dips or brown-outs need to be known. Then the operating frequency should be considered and if there are particular requirements to avoid interference. If there are very specific frequencies that need to be avoided then external synchronization may be needed. This could also be desirable if multiple switchers are used as low frequency beating between similar devices can be undesirable. For efficient operation this converter requires a boost supply so that the base of the output transistor can be pumped above the input voltage during the switch on time. Depending on the input and output voltages the boost supply can be provided by the input voltage, one of the regulated outputs or an independent supply such as an LDO. Input Voltage Range Firstly, the LT3509 imposes some hard limits due to the undervoltage lock-out and the overvoltage protection. A given application will also have a reduced, normal operating range over which maximum efficiency and lowest ripple are obtained. This usually requires that the device is operating at a fixed frequency without skipping pulses. There may also be zones above and below the normal range where regulation is maintained but efficiency and ripple may be compromised. At the low end, insufficient input voltage will cause loss of regulation and increased ripple–this is the dropout range. At the high end if the duty cycle becomes too low this will cause pulse skipping and excessive ripple. This is the pulse-skip region. Both situations also lead to higher noise at frequencies other than the chosen switching frequency. Occasional excursions into pulse-skip mode, during surges for example, may be tolerable. Pulse skipping will also occur at light loads even within the normal operating range but ripple is usually not degraded because at light load the output capacitor can hold the voltage steady between pulses. To ensure the regulator is operating in continuous mode it is necessary to calculate the duty cycle for the required output voltage over the full input voltage range. This must then be compared with minimum and maximum practical duty cycles. |
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