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LT3682EDD-TRPBF Datasheet(PDF) 8 Page - Linear Technology |
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LT3682EDD-TRPBF Datasheet(HTML) 8 Page - Linear Technology |
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8 / 24 page  LT3682 8 3682f PIN FUNCTIONS VC (Pin 1): The VC pin is the output of the internal error amplifier. The voltage on this pin controls the peak switch current. Tie an RC network from this pin to ground to compensate the control loop. FB (Pin 2): The LT3682 regulates the FB pin to 0.8V. Connect the feedback resistor divider tap to this pin. PG (Pin 3): The PG pin is the open collector output of an internal comparator. PG remains low until the FB pin is within 10% of the final regulation voltage. PG output is valid when VIN is above the minimum input voltage and RUN/SS is high. GND (Pin 4): The GND pin is the ground of all the internal circuitry. Tie directly to the local GND plane. BD (Pin 5): This pin connects to the anode of the boost Schottky diode. BD also supplies current to the LT3682’s internal regulator. BOOST (Pin 6): This pin is used to provide a drive volt- age, higher than the input voltage, to the internal bipolar NPN power switch. Connect a capacitor (typically 0.22μF) between BOOST and SW. DA (Pin 7): Connect the anode of the catch diode (D1 in Block Diagram) to this pin. Internal circuitry senses the current through the catch diode providing frequency foldback in extreme situations. SW (Pin 8): The SW pin is the output of the internal power switch. Connect this pin to the inductor, catch diode and boost capacitor. RUN/SS (Pin 9): The RUN/SS pin is used to put the LT3682 in shutdown mode. Tie to ground to shut down the LT3682. Tie to 2.5V or more for normal operation. RUN/SS also provides a soft-start function; see the Applications Infor- mation section for more information. RT (Pin 10): Oscillator Resistor Input. Connect a resistor from this pin to ground to set the switching frequency. SYNC (Pin 11): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to 0.8V or more for pulse skipping mode operation. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1μs. Note that the maximum load current depends on which mode is chosen. See the Applications Information section for more information. VIN (Pin 12): The VIN pin supplies current to the LT3682’s internal regulator and to the internal power switch. This pin must be locally bypassed. ExposedPad(Pin13):PGND.Thisisthepowergroundused by the catch diode (D1) when its anode is connected to the DA pin. The exposed pad must be soldered to the PCB. |
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