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A1240A-1PL176I Datasheet(PDF) 1 Page - Actel Corporation |
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A1240A-1PL176I Datasheet(HTML) 1 Page - Actel Corporation |
1 / 38 page D e c e m ber 2000 1 © 2000 Actel Corporation v 4 .0.1 ACT™ 2 Family FPGAs Fe a t ur es • Up to 8000 Gate Array Gates (20,000 PLD equivalent gates) • Replaces up to 200 TTL Packages • Replaces up to eighty 20-Pin PAL® Packages • Design Library with over 500 Macro Functions • Single-Module Sequential Functions • Wide-Input Combinatorial Functions • Up to 1232 Programmable Logic Modules • Up to 998 Flip-Flops • Datapath Performance at 105 MHz • 16-Bit Accumulator Performance to 39 MHz • Two In-Circuit Diagnostic Probe Pins Support Speed Analysis to 50 MHz • Two High-Speed, Low-Skew Clock Networks • I/O Drive to 10 mA • Nonvolatile, User Programmable • Logic Fully Tested Prior to Shipment • 1.0-micron CMOS Technology P r o d u c t F a m ily P r o f ile Device A1225A A1240A A1280A Capacity Gate Array Equivalent Gates PLD Equivalent Gates TTL Equivalent Packages 20-Pin PAL Equivalent Packages 2,500 6,250 63 25 4,000 10,000 100 40 8,000 20,000 200 80 Logic Modules S-Modules C-Modules 451 231 220 684 348 336 1,232 624 608 Flip-Flops (maximum) 382 568 998 Routing Resources Horizontal Tracks/Channel Vertical Tracks/Channel PLICE Antifuse Elements 36 15 250,000 36 15 400,000 36 15 750,000 User I/Os (maximum) 83 104 140 Packages1 100 CPGA 100 PQFP 100 VQFP 84 PLCC 132 CPGA 144 PQFP 176 TQFP 84 PLCC 176 CPGA 160 PQFP 176 TQFP 84 PLCC 172 CQFP Performance2 16-Bit Prescaled Counters 16-Bit Loadable Counters 16-Bit Accumulators 105 MHz 70 MHz 39 MHz 100 MHz 69 MHz 38 MHz 85 MHz 67 MHz 36 MHz Notes: 1. See the “Product Plan” on page 3 for package availability. 2. Performance is based on ‘–2’ speed devices at commercial worst-case operating conditions using PREP Benchmarks, Suite #1, Version 1.2, dated 3-28-93, any analysis is not endorsed by PREP. |
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