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A54SX32A-1CQ208M Datasheet(PDF) 7 Page - Actel Corporation |
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A54SX32A-1CQ208M Datasheet(HTML) 7 Page - Actel Corporation |
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7 / 50 page  HiRel SX-A Family FPGAs v2.0 1-3 Type 2 SuperCluster is a two-wide group containing one Type 1 cluster and one Type 2 cluster. HiRel SX-A devices feature more Type 1 SuperCluster modules than Type 2 SuperCluster modules because designers typically require significantly more combinatorial logic than flip-flops. Routing Resources Clusters and SuperClusters can be connected through the use of two innovative local routing resources called FastConnect and DirectConnect, which enable extremely fast and predictable interconnection of modules within clusters and SuperClusters (Figure 1-5 on page 1-4 and Figure 1-6 on page 1-4). This routing architecture also dramatically reduces the number of antifuses required to complete a circuit, ensuring the highest possible performance. DirectConnect is a horizontal routing resource that provides connections from a C-cell to its neighboring R-cell in a given SuperCluster. DirectConnect uses a hardwired signal path requiring no programmable interconnection to achieve its fast signal propagation time of less than 0.1 ns. FastConnect enables horizontal routing between any two logic modules within a single SuperCluster and vertical routing to the SuperCluster immediately below it. Only one programmable connection is used in a FastConnect path, delivering a maximum pin-to-pin propagation time of 0.3 ns. In addition to DirectConnect and FastConnect, the architecture makes use of two globally oriented routing resources known as segmented routing and high-drive routing. The Actel segmented routing structure provides a variety of track lengths for extremely fast routing between SuperClusters. The exact combination of track lengths and antifuses within each path is chosen by the 100 percent automatic place-and-route software to minimize signal propagation delays. Figure 1-4 • Cluster Organization Type 1 SuperCluster Type 2 SuperCluster Cluster 1 Cluster 2 Cluster 2 Cluster 1 R-Cell C-Cell D0 D1 D2 D3 DB A0 B0 A1 B1 Sa Sb Y Direct Connect Input CLKA, CLKB, Internal Logic HCLK CKS CKP CLRB PSETB Y DQ Routed Data Input S0 S1 |
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