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LT6554 Datasheet(PDF) 9 Page - Linear Technology |
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LT6554 Datasheet(HTML) 9 Page - Linear Technology |
9 / 12 page LT6554 9 6554fa APPLICATIO S I FOR ATIO While the AGND pins on the LT6554 are not connected to the amplifier circuitry, tying them to ground or another “quiet” node significantly increases channel isolation and is always recommended. The AGND pins do have ESD protection and therefore should not be connected to potentials outside the power supply range. Low ESL/ESR bypass capacitors should be placed as close to the positive and negative supply pins as possible. One 4700pF ceramic capacitor is recommended for both V+ and V–. Additional 470pF ceramic capacitors with minimal trace length on each supply pin will further improve AC and transient response as well as channel isolation. For high current drive and large-signal transient applications, addi- tional 1µF to 10µF tantalums should be added on each supply. The smallest value capacitors should be placed closest to the package. To maintain the LT6554’s channel isolation, it is beneficial to shield parallel input and output traces using a ground plane or power supply traces. Vias between topside and backside metal are recommended to maintain a low inductance ground, especially between closely spaced signal traces. Single Supply Operation Figure 3 illustrates how to use the LT6554 with a single supply ranging from 4.5V to 12V. Since the output range is comparable to the input range, the DC bias point at the input can be set anywhere between the supplies that will prevent the AC-coupled signal from running into the output range limits. As shown, the DC input level is mid- supply. The only additional power dissipation in the single supply configuration is through the resistor bias string at the input and through any load resistance at the output. In many cases, the output can be used to directly drive other single supply devices without additional coupling and without any resistive load. ESD Protection The LT6554 has reverse-biased ESD protection diodes on all pins. If any pins are forced a diode drop above the positive supply or a diode drop below the negative supply, large currents may flow through these diodes. If the current is kept below 10mA, no damage to the device will occur. Figure 1. Response vs Output Trace Length Figure 2. Response vs Series Output Resistance Figure 3. Single Supply Configuration, One Channel Shown FREQUENCY (MHz) 0.1 6 4 2 0 –2 –4 –6 1 10 100 1000 6554 F01 4cm TRACE 0.2cm TRACE 2cm TRACE VS = ±5V VOUT = 200mVP-P RL = 1k TA = 25°C FREQUENCY (MHz) 0.1 6 4 2 0 –2 –4 –6 1 10 100 1000 6554 F02 4cm TRACE 4cm TRACE RS, OUT = 10Ω VS = ±5V VOUT = 200mVP-P RL = 1k TA = 25°C 1/3 LT6554 5k 5k AGND IN VIN 22µF OUT V+ V– 4.5V TO 12V 6554 F03 |
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