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RT54SX32S-1CQ256E Datasheet(PDF) 1 Page - Actel Corporation |
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RT54SX32S-1CQ256E Datasheet(HTML) 1 Page - Actel Corporation |
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1 / 84 page  November 2004 i © 2004 Actel Corporation See Actel’s website for the latest version of the datasheet RTSX-S RadTolerant FPGAs Designed for Space • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case Geosynchronous Orbit • Up to 100 krad (Si) Total Ionizing Dose (TID) – Parametric Performance Supported with Lot- Specific Test Data • Single-Event Latch-Up (SEL) Immunity • TM1019.5 Test Data Available • QML Certified Devices High Performance • 230 MHz System Performance • 310 MHz Internal Performance • 9.5 ns Input Clock to Output Pad Specifications • 0.25 µm Metal-to-Metal Antifuse Process • 48,000 to 108,000 Available System Gates • Up to 2,012 SEU-Hardened Flip-Flops • Up to 360 User-Programmable I/O Pins Features • Very Low Power Consumption (Up to 68 mW at Standby) • 3.3V and 5V Mixed Voltage • Configurable I/O Support for 3.3V/5V PCI, LVTTL, TTL, and CMOS – 5V Input Tolerance and 5V Drive Strength – Slow Slew Rate Option – Configurable Weak Resistor Pull-Up/Down for Tristated Outputs at Power-Up – Hot-Swap Compliant with Cold-Sparing Support • Secure Programming Technology Prevents Reverse Engineering and Design Theft • 100% Circuit Resource Utilization with 100% Pin Locking • Unique In-System Diagnostic and Verification Capability with Silicon Explorer II • Low-Cost Prototyping Option • Deterministic, User-Controllable Timing • JTAG Boundary Scan Testing in Compliance with IEEE Standard 1149.1 – Dedicated JTAG Reset (TRST) Pin ™ e u Table 1 • RTSX-S Product Profile Device RT54SX32S RT54SX72S Capacity Typical Gates System Gates 32,000 48,000 72,000 108,000 Logic Modules Combinatorial Cells SEU-Hardened Register Cells (Dedicated Flip-Flops) 2,880 1,800 1,080 6,036 4,024 2,012 Maximum Flip-Flops 1,980 4,024 Maximum User I/Os 227 360 Clocks 33 Quadrant Clocks 04 Speed Grades Std., –1 Std., –1 Package (by pin count) CQFP CCGA CCLG 208, 256 256 208, 256 624 v2.2 |
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