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RTAX1000-SLCG624B Datasheet(PDF) 1 Page - Actel Corporation

Part # RTAX1000-SLCG624B
Description  RTAX-S/SL RadTolerant FPGAs
Download  170 Pages
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Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

RTAX1000-SLCG624B Datasheet(HTML) 1 Page - Actel Corporation

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October 2008
i
© 2008 Actel Corporation
See the Actel website for the latest version of the datasheet.
All RTAX4000S information is preliminary.
RTAX-S/SL RadTolerant FPGAs
Radiation Performance
SEU-Hardened Registers Eliminate the Need for Triple-
Module Redundancy (TMR)
Immune to Single-Event Upsets (SEU) to LETTH > 37
MeV-cm2/mg
–SEU
Rate
<
10-10
Errors/Bit-Day
in
Worst-Case
Geosynchronous Orbit
Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with
Use of Error Detection and Correction (EDAC) IP (included)
with Integrated SRAM Scrubber
Single-Bit Correction, Double-Bit Detection
Variable-Rate Background Refreshing
Total Ionizing Dose Up to 300 krad (Si, Functional)
Single-Event Latch-Up Immunity (SEL) to LETTH > 117 MeV-
cm2/mg
TM1019 Test Data Available
Single Event Transient (SET) – No Anomalies up to 150 MHz
Processing Flows
B-Flow – MIL-STD-883B
E-Flow – Actel Extended Flow
EV-Flow – Class V Equivalent Flow Processing Consistent
with MIL-PRF 38535
Prototyping Options
Commercial
Axcelerator
Devices
for
Functional
Verification
RTAX-S PROTO Devices with Same Functional and Timing
Characteristics as Flight Unit in a Non-Hermetic Package
RTAX-SL Low Power Option
Offers Approximately Half the Standby Current of the
Standard RTAX-S Device at Worst-Case Conditions
Leading-Edge Performance
High-Performance Embedded FIFOs
350+ MHz System Performance
500+ MHz Internal Performance
700 Mb/s LVDS Capable I/Os
Specifications
Up to 4 Million Equivalent System Gates or 500 k
Equivalent ASIC Gates
Up to 20,160 SEU-Hardened Flip-Flops
Up to 840 I/Os
Up to 540 kbits Embedded SRAM
Manufactured on Advanced 0.15
μm CMOS Antifuse
Process Technology, 7 Layers of Metal
Electrostatic Discharge (ESD) is 2,000 V (HBM MIL-STD-883,
TM3015)
Features
Single-Chip, Nonvolatile Solution
1.5 V Core Voltage for Low Power
Flexible, Multi-Standard I/Os:
1.5 V, 1.8 V, 2.5 V, 3.3 V Mixed Voltage Operation
Bank-Selectable I/Os – 8 Banks per Chip
Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3 V PCI
JTAG Boundary Scan Testing (as per IEEE 1149.1)
Differential I/O Standards: LVPECL and LVDS
Voltage-Referenced I/O Standards: GTL+, HSTL Class 1,
SSTL2 Class 1 and 2, SSTL3 Class 1 and 2
Hot-Swap
Compliant
with
Cold-Sparing
Support
(Except PCI)
Embedded Memory with Variable Aspect Ratio and
Organizations:
Independent, Width-Configurable Read and Write Ports
Programmable Embedded FIFO Control Logic
ROM Emulation Capability
Deterministic, User-Controllable Timing
Unique In-System Diagnostic and Debug Capability
Table 1 • RTAX-S/SL Family Product Profile
Device
RTAX250S/SL
RTAX1000S/SL
RTAX2000S/SL
RTAX4000S
Capacity
Equivalent System Gates
ASIC Gates
250,000
30,000
1,000,000
125,000
2,000,000
250,000
4,000,000
500,000
Modules
Register (R-cells)
Combinatorial (C-cells)
Flip-Flops (maximum)
1,408
2,816
2,816
6,048
12,096
12,096
10,752
21,504
21,504
20,160
40,320
40,320
Embedded RAM/FIFO (without EDAC)
Core RAM Blocks
Core RAM Bits (K = 1,024)
12
54 k
36
162 k
64
288 k
120
540 k
Clocks (segmentable)
Hardwired
Routed
4
4
4
4
4
4
4
4
I/Os
I/O Banks
User I/Os (maximum)
I/O Registers
8
198
744
8
418
1,548
8
684
2,052
8
840
2,520
Package
CCGA/LGA
CQFP
208, 352
624
352
624, 1152
256, 352
1272
352
v5.3


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