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TS80C32X2-VCCB Datasheet(PDF) 9 Page - TEMIC Semiconductors |
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TS80C32X2-VCCB Datasheet(HTML) 9 Page - TEMIC Semiconductors |
9 / 54 page Rev. B - Jan. 25, 1999 9 Preliminary TS80C52X2 Table 4. CKCON Register CKCON - Clock Control Register (8Fh) Reset Value = XXXX XXX0b Not bit addressable 7 6 5 4 3 2 1 0 - - - - - - - X2 Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 - Reserved The value read from this bit is indeterminate. Do not set this bit. 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3 - Reserved The value read from this bit is indeterminate. Do not set this bit. 2 - Reserved The value read from this bit is indeterminate. Do not set this bit. 1 - Reserved The value read from this bit is indeterminate. Do not set this bit. 0 X2 CPU and peripheral clock bit Clear to select 12 clock periods per machine cycle (STD mode, FOSC=FXTAL/2). Set to select 6 clock periods per machine cycle (X2 mode, FOSC=FXTAL). |
Similar Part No. - TS80C32X2-VCCB |
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