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LTC1266CS-3.3 Datasheet(PDF) 6 Page - Linear Technology

Part # LTC1266CS-3.3
Description  Synchronous Regulator Controller for N- or P-Channel MOSFETs
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1266CS-3.3 Datasheet(HTML) 6 Page - Linear Technology

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LTC1266
LTC1266-3.3/LTC1266-5
TDRIVE (Pin 1): High Current Drive for Topside MOSFET.
This MOSFET can be either P-channel or N-channel, user
selectable by Pin 3. Voltage swing at this pin is from PWR
VIN to ground.
PWR VIN (Pin 2): Power Suppy for Drive Signals. Must be
closely decoupled to power ground (Pin 15).
PINV (Pin 3): Phase Invert. Sets the phase of the topside
driver to drive either a P-channel or an N-channel MOSFET
as follows:
P-channel: Pin 3 = 0V
N-channel: Pin 3 = PWR VIN
BINH (Pin 4): Burst Mode Operation Inhibit. A CMOS logic
high on this pin will disable the Burst Mode operation
feature forcing continuous operation down to zero load.
VIN (Pin 5): Main Supply Pin.
CT (Pin 6): External Capacitor. CT from Pin 4 to ground sets
the operating frequency. The actual frequency is also
dependent on the input voltage.
ITH (Pin 7): Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 7 voltage.
SENSE (Pin 8): Connects to internal resistive divider
which sets the output voltage in LTC1266-3.3 and
LTC1266-5 versions. Pin 8 is also the (–) input for the
current comparator.
SENSE + (Pin 9): The (+) Input to the Current Comparator.
A built-in offset between Pins 8 and 9 in conjunction with
RSENSE sets the current trip threshold.
VFB (Pin 10): For the LTC1266 adjustable version, Pin 10
serves as the feedback pin from an external resistive
divider used to set the output voltage. On LTC1266-3.3
and LTC1266-5 versions this pin is not used.
SHDN (Pin 11): When grounded, the LTC1266 series
operates normally. Pulling Pin 11 high holds both
MOSFETs off and puts the LTC1266 in micropower shut-
down mode. Requires CMOS logic signal with tr, tf < 1µs.
Should not be left floating.
SGND (Pin 12): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of COUT.
LBIN (Pin 13): Input to the Low-Battery Comparator. This
input is compared to an internal 1.25V reference.
LBOUT (Pin 14): Open Drain Output of the Low-Battery
Comparator. This pin will sink current when Pin 13 is
below 1.25V.
PGND (Pin 15): Driver Power Ground. Connects to source
of N-channel MOSFET and the (–) terminal of CIN.
BDRIVE (Pin 16): High Current Drive for Bottom
N-Channel MOSFET. Voltage swing at Pin 16 is from
ground to PWR VIN.
PI FU CTIO S
OUTPUT VOLTAGE (V)
01
40
60
5
1266 G10
20
0
2
34
100
80
LTC1266-3.3
LTC1266-5
VSENSE
= VOUT
(VIN – VOUT) VOLTAGE (V)
0
2.5
3.0
12
10
8
1266 G11
0.5
1.5
2.0
1.0
0
2
4
6
14
16
VOUT = 3.3V
0
°C
70
°C
25
°C
TEMPERATURE (
°C)
0
100
150
200
80
1266 G12
50
0
–50
20
40
60
100
MAX THRESHOLD
MIN THRESHOLD (Burst Mode
OPERATION INHIBIT)
MIN THRESHOLD (Burst Mode
OPERATION ENABLED)
Off-Time vs Output Voltage
Operating Frequency
vs (VIN – VOUT) Voltage
Current Sense Threshold Voltage
TYPICAL PERFOR A CE CHARACTERISTICS


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