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LTC1726EMS8-2.5 Datasheet(PDF) 9 Page - Linear Technology |
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LTC1726EMS8-2.5 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 12 page  9 LTC1726 1726fb Disabling the Watchdog Timer 1 2 3 4 8 7 6 5 VCC3 VCCA GND RT WT RST WDI LTC1726-5/2.5 3.3V SYSTEM RESET *TO PRESERVE THRESHOLD ACCURACY, SET PARALLEL COMBINATION OF R1 AND R2 ≤ 66.5k THE WATCHDOG TIMER CAN BE DISABLED BY CONNECTING THE WDI AND WT PINS TO GROUND. THE PART WILL ACT STRICTLY AS A TRIPLE SUPPLY MONITOR WITH AN ADJUSTABLE RESET TIME-OUT PERIOD CRT 5V/2.5V R2* R1* 1726 TA03 ADJUSTABLE SUPPLY VCC5/ VCC25 1 2 3 4 8 7 6 5 VCC3 VCC5 VCCA GND RT WT RST WDI LTC1726-5 3.3V SYSTEM RESET *TO PRESERVE THRESHOLD ACCURACY, SET PARALLEL COMBINATION OF R1 AND R2 ≤ 66.5k CRT CWT WDI 5V R2* R1* 1726 TA04 ADJUSTABLE SUPPLY OR DC/DC FEEDBACK DIVIDER Triple Supply Monitor (3.3V, 5V and Adjustable) Dual Supply Monitor (3.3V and 5V, Defeat VCCA Input) 1 2 3 4 8 7 6 5 VCC3 VCC5 VCCA GND RT WT RST WDI LTC1726-5 3.3V SYSTEM RESET WDI 5V 1726 TA05 CRT CWT TYPICAL APPLICATIO S APPLICATIO S I FOR ATIO Selecting the Reset and Watchdog Time-Out Capacitors The reset time-out period is adjustable in order to accom- modate a variety of µP applications. The reset time-out period, tRT, is adjusted by connecting a capacitor, CRT, between the RT pin and ground. The value of this capacitor is determined as follows: CRT = tRT/3.30 with CRT in pF and tRT in µs (i.e., 1500pF ⇒ 4.95ms). The capacitor should be a low leakage type. A ceramic capacitor is recommended. The watchdog period is also adjustable so that the watch- dog time-out period can be optimized for software execu- tion. The watchdog time-out period, tWT, is adjusted by connecting a capacitor, CWT, between the WT pin and ground. Once the optimum watchdog time-out period (tWT) is determined, the value of the capacitor is calculated as follows: CWT = tWT/21.8 with CWT in pF and tWT in µs (i.e., 1500pF ⇒ 32.7ms). The capacitor should be a low leakage type. A ceramic capacitor is recommended. |
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