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LTC6240CS8 Datasheet(PDF) 11 Page - Linear Technology |
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LTC6240CS8 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 28 page  LTC6240/LTC6241/LTC6242 11 624012fc ELECTRICAL CHARACTERISTICS (LTC6240HVH/LTC6241HVH/LTC6242HVH) The ● denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = ±5V, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOL Output Voltage Swing Low (Note 9) No Load ISINK = 1mA ISINK = 10mA ● ● ● 30 85 600 mV mV mV VOH Output Voltage Swing High (Note 9) No Load ISOURCE = 1mA ISOURCE = 10mA ● ● ● 30 85 600 mV mV mV PSRR Power Supply Rejection VS = 2.8V to 11V, VCM = 0.2V ● 83 dB PSRR Match Channel-to-Channel (Note 5) ● 82 dB Minimum Supply Voltage (Note 10) ● 2.8 V ISC Short-Circuit Current ● 15 mA IS Supply Current per Amplifier LTC6241, LTC6242 ● 2.5 3.2 3.7 mA mA LTC6240 ● 2.7 3.3 3.8 mA mA GBW Gain Bandwidth Product Frequency = 20kHz, RL = 1kΩ ● 12 MHz SR Slew Rate (Note 11) AV = –2, RL = 1kΩ ● 5 V/µs FPBW Full Power Bandwidth (Note 12) VOUT = 3VP-P, RL = 1kΩ ● 0.53 MHz Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 3: The LTC6240C/LTC6240HVC/LTC6241C/LTC6241HVC, LTC6242C/ LTC6242HVC are guaranteed to meet specified performance from 0°C to 70°C. They are designed, characterized and expected to meet specified performance from –40°C to 85°C, but are not tested or QA sampled at these temperatures. The LTC6240I/LTC6240HVI, LTC6241I/LTC6241HVI, LTC6242I/LTC6242HVI are guaranteed to meet specified performance from –40°C to 85°C. All versions of the LTC6240H/LTC6241H/LTC6242H are guaranteed to meet specified performance from –40°C to 125°C. Note 4: ESD (Electrostatic Discharge) sensitive device. ESD protection devices are used extensively internal to the LTC6240/LTC6241/LTC6242; however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 5: Matching parameters are the difference between the two amplifiers A and D and between B and C of the LTC6242; between the two amplifiers of the LTC6241. CMRR and PSRR match are defined as follows: CMRR and PSRR are measured in µV/V on the matched amplifiers. The difference is calculated between the matching sides in µV/V. The result is converted to dB. Note 6: This parameter is not 100% tested. Note 7: Bias current at TA = 25°C is 100% tested and guaranteed for the LTC6240 in the S8 package. The LTC6240S5, LTC6241 and LTC6242 are expected to achieve the same performance as the LTC6240S8. All parts are guaranteed to meet specifications over temperature. Note 8: Current noise is calculated from the formula: in = (2qIB) 1/2 where q = 1.6 × 10–19 coulomb. The noise of source resistors up to 50GΩ dominates the contribution of current noise. See also Typical Characteristics curve Noise Current vs Frequency. Note 9: Output voltage swings are measured between the output and power supply rails. Note 10: Minimum supply voltage is guaranteed by the power supply rejection ratio test. Note 11: Slew rate is measured in a gain of –2 with RF = 1k and RG = 500Ω. On the LTC6240/LTC6241/LTC6242, VS = ±2.5V, VIN is ±1V and VOUT slew rate is measured between –1V and +1V. On the LTC6240HV/ LTC6241HV/LTC6242HV, VIN is ±2V and VOUT slew rate is measured between –2V and +2V. Note 12: Full-power bandwidth is calculated from the slew rate: FPBW = SR/πVP-P. |
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