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LTM4601V-1 Datasheet(PDF) 10 Page - Linear Technology |
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LTM4601V-1 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 28 page  LTM4601/LTM4601-1 10 4601f APPLICATIO S I FOR ATIO The typical LTM4601 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 2 for specific external capacitor requirements for a particular application. VIN to VOUT Step-Down Ratios There are restrictions in the maximum VIN and VOUT step down ratio that can be achieved for a given input voltage. These constraints are shown in the Typical Performance Characteristics curves labeled VIN to VOUT Step-Down Ratio. Note that additional thermal derating may apply. See the Thermal Considerations and Output Current Derating section of this data sheet. Output Voltage Programming and Margining The PWM controller has an internal 0.6V reference voltage. As shown in the Block Diagram, a 1M and a 60.4k 0.5% internal feedback resistor connects VOUT and VFB pins together. The VOUT_LCL pin is connected between the 1M and the 60.4k resistor. The 1M resistor is used to protect against an output overvoltage condition if the VOUT_LCL pin is not connected to the output, or if the remote sense amplifier output is not connected to VOUT_LCL. The output voltage will default to 0.6V. Adding a resistor RSET from the VFB pin to SGND pin programs the output voltage: VV kR R OUT SET SET = + 06 60 4 . . Table 1. Standard 1% Resistor Values RSET (k Ω) Open 60.4 40.2 30.1 25.5 19.1 13.3 8.25 VOUT (V) 0.6 1.2 1.5 1.8 2 2.5 3.3 5 The MPGM pin programs a current that when multiplied by an internal 10k resistor sets up the 0.6V reference ± offset for margining. A 1.18V reference divided by the RPGM resistor on the MPGM pin programs the current. Calculate VOUT(MARGIN): V V V OUT MARGIN OUT OUT () % • = 100 where %VOUTisthepercentageofVOUTyouwanttomargin, and VOUT(MARGIN) is the margin quantity in volts: R V V V V k PGM OUT OUT MARGIN = 06 118 10 . • . • () where RPGM is the resistor value to place on the MPGM pin to ground. The output margining will be ± margining of the value. This is controlled by the MARG0 and MARG1 pins. See the truth table below: MARG0 MARG1 MODE LOW LOW NO MARGIN LOW HIGH MARGIN UP HIGH LOW MARGIN DOWN HIGH HIGH NO MARGIN Input Capacitors LTM4601 module should be connected to a low AC imped- ance DC source. Input capacitors are required to be placed adjacent to the module. In Figure 18, the 10µF ceramic input capacitors are selected for their ability to handle the large RMS current into the converter. An input bulk capacitor of 100µF is optional. This 100µF capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. |
Similar Part No. - LTM4601V-1 |
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Similar Description - LTM4601V-1 |
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