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LTC2242CUP-10-TRPBF Datasheet(PDF) 5 Page - Linear Technology |
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LTC2242CUP-10-TRPBF Datasheet(HTML) 5 Page - Linear Technology |
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5 / 28 page  LTC2242-10 5 224210fc POWER REQUIREMENTS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Analog Supply Voltage (Note 8) ● 2.375 2.5 2.625 V PSLEEP Sleep Mode Power SHDN = High, OE = High, No CLK 1 mW PNAP Nap Mode Power SHDN = High, OE = Low, No CLK 28 mW LVDS OUTPUT MODE OVDD Output Supply Voltage (Note 8) ● 2.375 2.5 2.625 V IVDD Analog Supply Current ● 285 320 mA IOVDD Output Supply Current ● 58 70 mA PDISS Power Dissipation ● 858 975 mW CMOS OUTPUT MODE OVDD Output Supply Voltage (Note 8) ● 0.5 2.5 2.625 V IVDD Analog Supply Current (Note 7) ● 285 320 mA PDISS Power Dissipation 740 mW The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fS Sampling Frequency (Note 8) ● 1 250 MHz tL ENC Low Time (Note 7) Duty Cycle Stabilizer Off Duty Cycle Stabilizer On ● ● 1.9 1.5 2 2 500 500 ns ns tH ENC High Time (Note 7) Duty Cycle Stabilizer Off Duty Cycle Stabilizer On ● ● 1.9 1.5 2 2 500 500 ns ns tAP Sample-and-Hold Aperture Delay 0.4 ns tOE Output Enable Delay (Note 7) ● 510 ns LVDS OUTPUT MODE tD ENC to DATA Delay (Note 7) ● 1 1.7 2.8 ns tC ENC to CLKOUT Delay (Note 7) ● 1 1.7 2.8 ns DATA to CLKOUT Skew (tC – tD) (Note 7) ● –0.6 0 0.6 ns Rise Time 0.5 ns Fall Time 0.5 ns Pipeline Latency 5 Cycles CMOS OUTPUT MODE tD ENC to DATA Delay (Note 7) ● 1 1.7 2.8 ns tC ENC to CLKOUT Delay (Note 7) ● 1 1.7 2.8 ns DATA to CLKOUT Skew (tC – tD) (Note 7) ● –0.6 0 0.6 ns Pipeline Latency Full Rate CMOS 5 Cycles Demuxed Interleaved 5 Cycles Demuxed Simultaneous 5 and 6 Cycles |
Similar Part No. - LTC2242CUP-10-TRPBF |
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Similar Description - LTC2242CUP-10-TRPBF |
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