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LTC2420IS8 Datasheet(PDF) 11 Page - Linear Technology |
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LTC2420IS8 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 36 page  11 LTC2420 not disturb the cyclic operation described above. These modes of operation are described in detail in the Serial Interface Timing Modes section. Conversion Clock A major advantage delta-sigma converters offer over conventional type converters is an on-chip digital filter (commonly known as Sinc or Comb filter). For high resolution, low frequency applications, this filter is typi- cally designed to reject line frequencies of 50Hz or 60Hz plus their harmonics. In order to reject these frequencies in excess of 110dB, a highly accurate conversion clock is required. The LTC2420 incorporates an on-chip highly accurate oscillator. This eliminates the need for external frequency setting components such as crystals or oscilla- tors. Clocked by the on-chip oscillator, the LTC2420 rejects line frequencies (50Hz or 60Hz ±2%) a minimum of 110dB. Ease of Use The LTC2420 data output has no latency, filter settling or redundant data associated with the conversion cycle. There is a one-to-one correspondence between the conversion and the output data. Therefore, multiplexing an analog input voltage is easy. The LTC2420 performs offset and full-scale calibrations every conversion cycle. This calibration is transparent to the user and has no effect on the cyclic operation de- scribed above. The advantage of continuous calibration is extreme stability of offset and full-scale readings with re- spect to time, supply voltage change and temperature drift. Power-Up Sequence The LTC2420 automatically enters an internal reset state when the power supply voltage VCC drops below approxi- mately 2.2V. This feature guarantees the integrity of the conversion result and of the serial interface mode selec- tion which is performed at the initial power-up. (See the 2-wire I/O sections in the Serial Interface Timing Modes section.) When the VCC voltage rises above this critical threshold, the converter creates an internal power-on-reset (POR) signal with duration of approximately 0.5ms. The POR signal clears all internal registers. Following the POR signal, the LTC2420 starts a normal conversion cycle and follows the normal succession of states described above. The first conversion result following POR is accurate within the specifications of the device. Reference Voltage Range The LTC2420 can accept a reference voltage from 0V to VCC. The converter output noise is determined by the thermal noise of the front-end circuits, and as such, its value in microvolts is nearly constant with reference voltage. A decrease in reference voltage will not signifi- cantly improve the converter’s effective resolution. On the other hand, a reduced reference voltage will improve the overall converter INL performance. The recommended range for the LTC2420 voltage reference is 100mV to VCC. Input Voltage Range The converter is able to accommodate system level offset and gain errors as well as system level overrange situa- tions due to its extended input range, see Figure 3. The LTC2420 converts input signals within the extended input range of – 0.125 • VREF to 1.125 • VREF. For large values of VREF, this range is limited by the absolute maximum voltage range of – 0.3V to (VCC + 0.3V). Beyond this range, the input ESD protection devices begin to turn on and the errors due to the input leakage current increase rapidly. Input signals applied to VIN may extend below ground by – 300mV and above VCC by 300mV. In order to limit any APPLICATIO S I FOR ATIO 2420 F03 VCC + 0.3V 9/8VREF VREF 1/2VREF –0.3V –1/8VREF 0 NORMAL INPUT RANGE EXTENDED INPUT RANGE ABSOLUTE MAXIMUM INPUT RANGE Figure 3. LTC2420 Input Range |
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