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AKD4372 Datasheet(PDF) 5 Page - Asahi Kasei Microsystems

Part # AKD4372
Description  DAC with built-in PLL & HP-AMP
Download  62 Pages
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AKD4372 Datasheet(HTML) 5 Page - Asahi Kasei Microsystems

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[AK4372]
MS0684-E-02
2008/12
- 5 -
PIN/FUNCTION
No. Pin Name
I/O
Function
A1
SDATA
I
Audio Serial Data Input Pin
B2
BICK
I/O
Audio Serial Data Clock Pin
B3
LRCK
I/O
Input / Output Channel Clock Pin
A3
MCKI
I
External Master Clock Input Pin
C3
DVDD
-
Digital Power Supply Pin, 1.6
∼ 3.6V
A4
VCOC
O
Output for Loop Filter of PLL Circuit
This pin must be connected to VSS2 with one resistor and one capacitor in series.
A5
VSS2
-
Ground 2 Pin. Connected to VSS1.
B4
MCKO
O
Master Clock Output Pin
SDA
I/O
Control Data Input/Output Pin (I2C mode : I2C pin = “H”)
C4
CDTI
I
Control Data Input Pin (3-wire serial mode : I2C pin = “L”)
SCL
I
Control Data Clock Pin (I2C mode : I2C pin = “H”)
B5
CCLK
I
Control Data Clock Pin (3-wire serial mode : I2C pin = “L”)
CAD0
I
Chip Address 0 Select Pin (I2C mode : I2C pin = “H”)
C5
CSN
I
Chip Select Pin (3-wire serial mode : I2C pin = “L”)
D5
PDN
I
Power-down & Reset
When “L”, the AK4372 is in power-down mode and is held in reset.
The AK4372 must be reset once upon power-up.
D3
I2C
I
Control Mode Select Pin
“H”: I2C Bus, “L”: 3-wire Serial
E5
MUTET
O
Mute Time Constant Control pin
Connected to the VSS1 pin with a capacitor for mute time constant.
D4
LOUT
O
Lch Stereo Line Output Pin
E4
ROUT
O
Rch Stereo Line Output Pin
E3
VCOM
O
Common Voltage Output Pin
Normally connected to the VSS1 pin with a 2.2
μF electrolytic capacitor.
E2
AVDD
-
Analog & PLL Power Supply Pin, 1.6
∼ 3.6V
E1
VSS1
-
Ground 1 Pin
D2
HPR
O
Rch Headphone Amp Output
D1
HPL
O
Lch Headphone Amp Output
C1
MIN
I
Mono Analog Input Pin
RIN
I
Rch Analog Input Pin (LDIF bit =“0” : Single-ended Input)
B1
IN+
I
Positive Line Input Pin (LDIF bit =“1” : Full-differential Input)
LIN
I
Rch Analog Input Pin (LDIF bit =“0” : Single-ended Input)
C2
IN−
I
Negative Line Input Pin (LDIF bit =“1” : Full-differential Input )
Note 1. All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must not
be left floating. The MCKI pin can be left floating only when the PDN pin = “L”.


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