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LTC2497CUHF Datasheet(PDF) 4 Page - Linear Technology |
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LTC2497CUHF Datasheet(HTML) 4 Page - Linear Technology |
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4 / 28 page  LTC2497 4 2497f I2C INPUTS AND DIGITAL OUTPUTS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIH High Level Input Voltage ● 0.7VCC V VIL Low Level Input Voltage ● 0.3VCC V VIHA High Level Input Voltage for Address Pins CA0, CA1, CA2 ● 0.95VCC V VILA Low Level Input Voltage for Address Pins CA0, CA1, CA2 ● 0.05VCC V RINH Resistance from CA0, CA1, CA2 to VCC to Set Chip Address Bit to 1 ● 10 kΩ RINL Resistance from CA0, CA1, CA2 to GND to Set Chip Address Bit to 0 ● 10 kΩ RINF Resistance from CA0, CA1, CA2 to GND or VCC to Set Chip Address Bit to Float ● 2 MΩ II Digital Input Current ● –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 5) ● 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA ● 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to 400pF (Note 14) ● 20 + 0.1CB 250 ns IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC ● 1µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1, CA2) for Valid Float ● 10 pF POWER REQUIREMENTS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Supply Voltage ● 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) Sleep Mode (Note 11) ● ● 160 1 275 2 µA µA ANALOG INPUT AND REFERENCE The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) IDC_LEAK(IN – ) IN– DC Leakage Current Sleep Mode, IN– = GND ● –10 1 10 nA IDC_LEAK(REF + ) REF+ DC Leakage Current Sleep Mode, REF+ = VCC ● –100 1 100 nA IDC_LEAK(REF – ) REF– DC Leakage Current Sleep Mode, REF– = GND ● –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB |
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