LTC3025

7

3025fb

Operation (Refer to Block Diagram)

The LTC3025 is a micropower, VLDO (very low dropout)

linear regulator which operates from input voltages as

low as 0.9V. The device provides a high accuracy output

that is capable of supplying 300mA of output current with

a typical dropout voltage of only 45mV. A single ceramic

capacitor as small as 1μF is all that is required for output

bypassing. A low reference voltage allows the LTC3025

output to be programmed to much lower voltages than

available in common LDOs (range of 0.4V to 3. 6V).

As shown in the Block Diagram, the BIAS input supplies

the internal reference and LDO circuitry while all output

current comes directly from the IN input for high efficiency

shutdown making the LTC3025 an ideal choice for use in

battery-powered systems.

The device includes current limit and thermal overload

protection. The fast transient response of the follower

output stage overcomes the traditional tradeoff between

dropout voltage, quiescent current and load transient

response inherent in most LDO regulator architectures.

The LTC3025 also includes overshoot detection circuitry

which brings the output back into regulation when going

from heavy to light output loads (see Figure 1).

APPLICATIONS INFORMATION

Adjustable Output Voltage

The output voltage is set by the ratio of two external resis-

tors as shown in Figure 2. The device servos the output

to maintain the ADJ pin voltage at 0.4V (referenced to

ground). Thus the current in R1 is equal to 0.4V/R1. For

good transient response, stability, and accuracy, the current

in R1 should be at least 8μA, thus the value of R1 should

be no greater than 50k. The current in R2 is the current in

R1 plus the ADJ pin bias current. Since the ADJ pin bias

current is typically <10nA, it can be ignored in the output

voltage calculation. The output voltage can be calculated

using the formula in Figure 2. Note that in shutdown the

output is turned off and the divider current will be zero

The LTC3025 operates at a relatively high gain of –0.7μV/

mA referred to the ADJ input. Thus a load current change

of 1mA to 300mA produces a –0.2mV drop at the ADJ

input. To calculate the change referred to the output sim-

ply multiply by the gain of the feedback network (i. e. ,1

+ R2/R1). For example, to program the output for 1.2V

choose R2/R1 = 2. In this example, an output current

change of 1mA to 300mA produces –0.2mV • (1 + 2) =

0.6mV drop at the output.

Because the ADJ pin is relatively high impedance (depend-

ing on the resistor divider used) , stray capacitance at this

pin should be minimized (<10pF) to prevent phase shift

in the error amplifier loop. Additionally, special attention

should be given to any stray capacitances that can couple

external signals onto the ADJ pin producing undesirable

output ripple. For optimum performance connect the ADJ

pin to R1 and R2 with a short PCB trace and minimize all

other stray capacitance to the ADJ pin.

300mA

0mA

AC

20mV/DIV

100μs/DIV

3025 F01

()

OUT

R1

R2

3025 F02

R2

R1

ADJ

GND

Figure 1. LTC3025 Transient Response

Figure 2. Programming the LTC3025