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LTC3035 Datasheet(PDF) 8 Page - Linear Technology |
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LTC3035 Datasheet(HTML) 8 Page - Linear Technology |
8 / 12 page LTC3035 8 3035f temperature range. The X5R only loses about 40% of its rated capacitance over the operating temperature range. The X5R and X7R dielectrics result in more stable charac- teristics and are more suitable for use as the output capacitor. The X7R type has better stability across tem- perature and bias voltage, while the X5R is less expensive and is available in higher values. In all cases, the output capacitance should never drop below 0.4 µF, or instability or degraded performance may occur. Charge Pump Component Selection The flying capacitor controls the strength of the charge pump. In order for the charge pump to deliver its maximum available current, a 0.1 µF or greater ceramic capacitor should be used. Warning: A polarized capacitor such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3035. Low ESR ceramic capacitors should always be used for the flying capacitor. A 1 µF or greater low ESR (<0.1Ω) ceramic capacitor is recommended to bypass the BIAS pin. Larger values of capacitance will not reduce the size of the BIAS ripple much, but will decrease the ripple frequency proportion- ally. The BIAS pin should maintain 0.4 µF of capacitance at all times to ensure correct operation. High ESR tantalum and electrolytic capacitors may be used, but a low ESR ceramic must be used in parallel for correct operation. It is also recommended that IN be bypassed to ground with a 1 µF or greater ceramic capacitor. Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125 °C). The power dissipated by the device will be the output current multiplied by the input/output voltage differential: (IOUT)(VIN – VOUT) The LTC3035 has internal thermal limiting designed to protect the device during momentary overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125 °C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through holes can also be used to spread the heat generated by power devices. A junction to ambient thermal coefficient of 76 °C/W is achieved by connecting the Exposed Pad of the DFN package directly to a ground plane of about 2500mm2. Figure 6. Ceramic Capacitor Temperature Characteristics Figure 5. Ceramic Capacitor DC Bias Characteristics DC BIAS VOLTAGE (V) 3035 F05 20 0 –20 –40 –60 –80 –100 0 2 45 6 13 X5R Y5V BOTH CAPACITORS ARE 1 µF, 6.3V, 0402 CASE SIZE TEMPERATURE ( °C) –50 –100 –80 –60 –40 –20 X5R Y5V 20 –25 025 50 3035 F06 75 0 BOTH CAPACITORS ARE 1 µF, 6.3V, 0402 CASE SIZE APPLICATIO S I FOR ATIO |
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