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LTC3220IPF-PBF Datasheet(PDF) 7 Page - Linear Technology |
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LTC3220IPF-PBF Datasheet(HTML) 7 Page - Linear Technology |
7 / 20 page LTC3220/LTC3220-1 7 32201fb PIN FUNCTIONS 24 1.22V VIN 25 RST 10 DVCC 12 SDA 11 SCL 22 23 26 27 28 C2M C1M C2P C1P CPO 29 EXPOSED PAD 1 2 850kHz OSCILLATOR CONTROL LOGIC MASTER/SLAVE REG SHIFT REGISTER CHARGE PUMP 18 UNIVERSAL CURRENT SOURCES AND DACS 3 4 5 6 7 18 8 9 ULED1 ULED2 ULED3 ULED4 ULED5 ULED6 ULED7 ULED8 ULED9 13 ULED10 14 ULED11 15 ULED12 16 ULED13 17 ULED14 18 ULED15 19 ULED16 20 ULED17 21 ULED18 3220 BD BLOCK DIAGRAM SDA (Pin 12): Input Data for the Serial Port. Serial data is shifted in one bit per clock cycle to control the LTC3220/ LTC3220-1. The logic level is referenced to DVCC. C1P, C2P, C1M, C2M (Pins 27, 26, 23, 22): Charge Pump Flying Capacitor Pins. A 2.2μF X7R or X5R ceramic ca- pacitor should be connected from C1P to C1M and C2P to C2M. VIN (Pin 24): Supply Voltage for the Entire Device. This pin must be bypassed with a single 2.2μF low ESR ceramic capacitor. RST (Pin 25): Active Low Reset Input. RST Resets all internal registers and forces LTC3220/LTC3220-1 into shutdown mode. CPO (Pin 28): Output of the Charge Pump. Used to power all LEDs. A 4.7μF X5R or X7R ceramic capacitor should be connected to ground. Exposed Pad (Pin 29): Ground. The Exposed Pad must be soldered to PCB ground. |
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