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LTC3407-3 Datasheet(PDF) 9 Page - Linear Technology |
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LTC3407-3 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 16 page  LTC3407-3 9 34073fa Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize voltage ripple and load step transients. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple ( ∆VOUT) is deter- mined by: ∆≈ ∆ + ⎛ ⎝⎜ ⎞ ⎠⎟ V I ESR fC OUT L O OUT 1 8 where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. With ∆IL = 0.3 • ILIM the output ripple will be less than 100mV at maximum VIN and fO = 2.25MHz with: ESRCOUT < 150mΩ Once the ESR requirements for COUT have been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. In surface mount applications, multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirement of the application. Alumi- num electrolytic, special polymer, ceramic and dry tantulum capacitors are all available in surface mount packages. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR(size) product of any aluminum electrolytic at a somewhat higher price. Special polymer capacitors, such as Sanyo POSCAP, Panasonic Special Polymer (SP), and Kemet A700, offer very low ESR, but have a lower capacitance density than other types. Tanta- lum capacitors have the highest capacitance density, but they have a larger ESR and it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. Aluminum electrolytic capacitors have a signifi- cantly larger ESR, and are often used in extremely cost- sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have the lowest ESR and cost, but also have the lowest capacitance density, a high voltage and tempera- ture coefficient, and exhibit audible piezoelectric effects. APPLICATIO S I FOR ATIO In addition, the high Q of ceramic capacitors along with trace inductance can lead to significant ringing. In most cases, 0.1 µF to 1µF of ceramic capacitors should also be placed close to the LTC3407-3 in parallel with the main capacitors for high frequency decoupling. Figure 2. LTC3407-3 General Schematic RUN2 VIN VIN VOUT2 VOUT1 RUN1 POR SW1 VOUT1 GND VOUT2 SW2 MODE/SYNC LTC3407-3 10 µF 100k RESET L1 µH L2 µH COUT2 COUT1 34073 F02 Ceramic Input and Output Capacitors Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempt- ing for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumen- tal in giving acceptable loop phase margin. Ceramic ca- pacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. Also, ceramic caps are prone to temperature effects which requires the designer to check loop stability over the operating temperature range. To minimize their large temperature and voltage coefficients, only X5R or X7R ceramic capacitors should be used. A good selection of ceramic capacitors is available from Taiyo Yuden, AVX, Kemet, TDK, and Murata. Great care must be taken when using only ceramic input and output capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. |
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Similar Description - LTC3407-3 |
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