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LTC3447 Datasheet(PDF) 9 Page - Linear Technology |
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LTC3447 Datasheet(HTML) 9 Page - Linear Technology |
9 / 16 page LTC3447 9 3447f External Start-Up Option The LTC3447 allows for the use of optional external resistors to determine the start-up voltage. Using this option, the start-up voltage can be set to levels inside or outside the DAC output’s operating range. The output voltage will be regulated at this value until the internal DAC is updated and a STOP command is received. Once the STOP command is received, the internal DAC will retain control of the output voltage until the part is disabled then enabled again. If this feature is not used, the feedback pin must be tied to VIN. I2C OPERATION n Typical 2-wire serial I2C n Serial interface n Simple 2-wire interface n Multiple devices on same bus n Idle bus must have SDA and SCL lines high n LTC3447 is write only n Master controls bus n Devices listen for unique address that precedes data General I2C Bus/SMBus Description I2C Bus and SMBus are reasonably similar examples of two wire, bidirectional, serial communications busses. Calling them two wire is not strictly accurate, as there is an implied third wire, which is the ground line. Large ground drops or spikes between the grounds of different parts on the bus can interrupt or disrupt communica- tions, as the signals on the two wires are both inherently referenced to a ground which is expected to be common to all parts on the bus. Both bus types have one data line and one clock line which are externally pulled to a high voltage when they are not being controlled by a device on the bus. The devices on the bus can only pull the data and clock lines low, which makes it simple to detect if more than one device is trying to control the bus; eventually, a device will release a line and it will not pull high because another device is still holding it low. Pull-ups for the data and clock lines are usually provided by external discrete resistors, but external current sources can also be used. Since there are no dedicated lines to use to tell a given device if another device is trying to communicate with it, each device must have a unique address to which it will respond. The first part of any communication is to send out an address on the bus and wait to see if another device responds to it. After a response is detected, meaningful data can be exchanged between the parts. Typically, one device will control the clock line at least most of the time and will normally be sending data to the other parts and polling them to send data back to it, and this device is called the master. There can certainly be more than one master, since there is an effective protocol to resolve bus contentions, and nonmaster (slave) devices can also control the clock to delay rising edges and give themselves more time to complete calculations or com- munications (clock stretching). Slave devices need to be able to control the data line to acknowledge communica- tions from the master, and some devices will need to able to send data back to the master; they will be in control of the data line while they are doing so. Many slave devices will have no need to stretch the clock signal and will have no ability to pull the clock line low, which is the case with the LTC3447. Data is exchanged in the form of bytes, which are 8-bit packets. Every byte needs to be acknowledged by the slave (data line pulled low) or not acknowledged by the master (data line left high), so communications are bro- ken up into 9-bit segments, one byte followed by one bit for acknowledging. For example, sending out an address consists of 7-bits of device address, 1-bit that signals whether a read or write operation will be performed, and then 1 more bit to allow the slave to acknowledge. There is no theoretical limit to how many total bytes can be exchanged in a given transmission. I2C and SMBus are very similar specifications, SMBus hav- ing been derived from I2C. In general, SMBus is targeted toward low power devices (particularly battery powered ones) and emphasizes low power consumption, while I2C is targeted toward higher speed systems where the power consumption of the bus is not so critical. I2C has three dif- ferent specifications for three different maximum speeds, these being standard mode (100kHz max), fast mode (400kHz max), and HS mode (3.4MHz max). Standard and fast mode are not radically different, but HS mode is very different from a hardware and software perspective and requires an initiating command at standard or fast speed before data can start transferring at HS speed. SMBus simply specifies a 100kHz maximum speed. OPERATIO |
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