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74ACT11286N Datasheet(PDF) 1 Page - Texas Instruments |
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74ACT11286N Datasheet(HTML) 1 Page - Texas Instruments |
1 / 6 page 74ACT11286 9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS SCAS069B – AUGUST 1988 – REVISED APRIL 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Inputs Are TTL-Voltage Compatible D Generates Either Odd or Even Parity for Nine Data Lines D Cascadable for n-Bits Parity D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise D EPICt (Enhanced-Performance Implanted CMOS) 1- mm Process D 500-mA Typical Latch-Up Immunity at 125 °C D Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description The 74ACT11286 universal 9-bit parity generator/checker features a local output for parity checking and a bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by cascading. The XMIT control input is implemented specifically to accommodate cascading. When the XMIT is low, the parity tree is disabled and the PARITY ERROR output remains at a high logic level, regardless of the input levels. When XMIT is high, the parity tree is enabled. PARITY ERROR indicates a parity error when either an even number of inputs (A through I) are high and PARITY I/O is forced to a low logic level, or when an odd number of inputs are high and PARITY I/O is forced to a high logic level. The I/O control circuitry is designed so that the I/O port remains in the high-impedance state during power up or power down, to prevent bus glitches. The 74ACT11286 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE NUMBER OF INPUTS (A–I ) THAT ARE HIGH XMIT INPUT PARITY I/O PARITY ERROR OUTPUT 0, 2, 4, 6, 8 l H H 1, 3, 5, 7, 9 l L H 02468 h h H 0, 2, 4, 6, 8 h l L 13579 h h L 1, 3, 5, 7, 9 h l H h = high input level, H = high output level, I = low input level, L = low output level Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 B A PARITY I/O GND PARITY ERROR XMIT I C D E VCC F G H D OR N PACKAGE (TOP VIEW) |
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