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FD5120TE-32.768K Datasheet(PDF) 2 Page - Pletronics, Inc. |
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FD5120TE-32.768K Datasheet(HTML) 2 Page - Pletronics, Inc. |
2 / 11 page FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 www.pletronics.com 425-776-1880 2 Description: The FD51xxT-32.768K is derived from the PLE FD51T series Programmable CMOS Clock Oscillator which is a modular PLL-based low cost, high-performance oscillator. The frequency output is set to 32.768KHz. The FD51xxT-32.768K base frequency is a 24.576MHz AT cut fundamental mode crystal. The FD5T has a separate output supply pin, V DDOUT, for either 1.8, 2.5 or 3.3V output logic levels. The device supply, V DD which provides power to all the internal circuits, is nominally 1.8V. The PLL is only utilized to support Spread Spectrum Clocking (SSC), in all other cases the PLL is disabled to reduce power. SSC may be programmed to be either center-spread or down-spread. This is an important technique to reduce electro-magnetic interference (EMI). The device supports non-volatile eePROM programming for easy customization of the device. As shipped, the device is pre-programmed. However, the FD51xxT-32.768K may be reprogrammed to a different configuration. Reprogramming may be either prior to assembly, or in-circuit via a 2-wire SDA/SCL I 2C bus. In-circuit programming is not allowed if the VCXO function is needed. Two programmable control inputs, S1 and S2, may be used to control various aspects of FD51xxT-32.768K operation including selection of alternative frequency set(s), selection of SSC functionality, output tri-state and power-down. Reference Oscillator The VCXO input has a limited voltage range, the VCXO is associated with the internal 1.8V core. A resistor in series with the Vcontrol input will permit interfacing to 3.3V analog circuits, the voltage range that changes the frequency will still be limited but the larger voltages swings will not cause problems. The VCXO function is only enabled (internally connected) if the part number indicates a VCXO specification. When the VCXO function is enabled the I 2C programming mode will be disabled. PLL Multiplier The PLL Multiplier is enabled when tight tolerances are needed or when the spread spectrum function is needed. Spread Spectrum The PLL has its individual Spread Spectrum (SS) function that can be enabled. This permits the modulation of the output frequency by a user-set amount. Divider Section The dividers operate on the output of the PLL. The divider on the PLL can divide by 1 through 1023 and is set to 750 in this case. There is only 1 setting allowed per divider. These are not set by the Sx input state. The dividers add very little jitter to the output signals. Multiplexers MUX #1 selects the input to the Divider #1, this can be the reference oscillator signal or the output from |
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