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LTC3824IMSE-TRPBF Datasheet(PDF) 3 Page - Linear Technology

Part # LTC3824IMSE-TRPBF
Description  High Voltage Step-Down Controller With 40關A Quiescent Current
Download  12 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3824IMSE-TRPBF Datasheet(HTML) 3 Page - Linear Technology

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LTC3824
3
3824fc
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3824E is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 85°C temperature range are assured by design characterization and
correlation with statistical process controls. The LTC3824I grade is
guaranteed over the full –40°C to 125°C operating junction temperature
range.
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, RSET = 392k, CCAP = 0.1μF. No load on any outputs, unless
otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VC Threshold for Switching Off
VSYNC/MODE = 0V (Note 4)
l
0.4
V
Soft-Start Current ISS
VSS = 0.1V to 1.5V
5
μA
VC Burst Mode Threshold
VCC ≤ 60V, VC Rising, SYNC/MODE Open
0.84
V
VC Burst Mode Threshold Hysteresis
VCC ≤ 60V
0.04
V
SENSE Voltage at Burst Mode Operation
(VCC–VSENSE) at 30% Duty Cycle
70% Duty Cycle
30
20
mV
mV
Current Limit Threshold (VCC–VSENSE)VCC ≤ 60V
l
80
100
120
mV
FB Overvoltage Threshold
VC = 1.6V
8
%
Sense Input Current
VSENSE = VCC
0.1
2
μA
OSCILLATOR
Switching Frequency
RSET = 392k
RSET = 200k
l
l
170
320
200
400
230
460
kHz
kHz
Synchronization Pulse Threshold
on SYNC Pin
Rising Edge VSYNC
1.3
V
Synchronization Frequency Range
RSET = 392k
RSET = 200k
l
l
230
460
300
600
kHz
kHz
VRSET
RSET = 392k
1.2
V
Minimum On-Time (Measured at GATE Pin)
3V Buck Converter Circuit, ILOAD > 2A
350
ns
Switching Frequency Foldback
VFB = 0.3V
l
35
50
75
kHz
GATE DRIVER
GATE Bias Voltage (VCC–VCAP)
9V ≤ VCC ≤ 60V, IGATE = 10mA
VCC = 12V, IGATE = 15mA
l
l
7.0
6.8
7.9
8.8
V
V
GATE Bias Voltage (VCAP–GND)
4V ≤ VCC ≤ 8V, IGATE = 10mA
6V ≤ VCC ≤ 8V, IGATE = 15mA, VCC = 12V
l
0.2
0.85
1.5
2.8
V
V
GATE High Voltage (VCC–VGATE)
4V ≤ VCC ≤ 60V, IGATE = –15mA
0.5
0.8
V
GATE Peak Source Current
CGATE = 10nF
2.5
A
GATE Low Voltage (VGATE–VCAP)
8V ≤ VCC ≤ 60V, IGATE = 15mA
4V ≤ VCC < 8V, IGATE = 10mA
0.1
0.05
0.5
V
V
GATE Peak Sink Current
CGATE = 10nF
2.5
A
Note 3: This parameter is tested in a feedback loop that servos VFB to the
reference voltage with the VC pin forced to 1V.
Note 4: This specification represents the maximum voltage on VC where
switching (GATE pin) is guaranteed to be off.


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