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LV9120DEV-125.0M-1K Datasheet(PDF) 6 Page - Pletronics, Inc. |
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LV9120DEV-125.0M-1K Datasheet(HTML) 6 Page - Pletronics, Inc. |
6 / 8 page LV96/LV98 Series 3.3 V LVDS Clock Oscillators January 2008 www.pletronics.com 425-776-1880 6 Mechanical: Inches mm B 0.356 + _0.005 9.04 + _0.13 C 0.126 + _0.005 3.21 + _0.13 D 0.324 + _0.005 8.23 + _0.13 F 1 0.050 1.27 Label: laser marked lettering FR4 PCB Base: Solder masked All via holes tented on bottom Copper Clad 670 µinch (17 µm) Nickel plated 118 µinch (3 µm) Gold plated 0.8 µinch (0.02 µm) Typical thicknesses Pin 3 Ground plane is typical Not to scale G 1 0.040 1.02 H 1 0.059 1.50 I 1 0.020 0.51 J 1 0.040 1.02 K 1 0.100 2.54 L 1 0.062 1.57 LV98 Pad LV96 Pad Function Note 2 1 Output Enable/Disable When this pad is not connected the oscillator shall operate. This is not a recommended condition!!!!!! When this pad is <0.80 volts, the output will be inhibited (High impedance state) Recommend connecting this pad to V CC if the oscillator is to be always on. 1 2 No function Recommend connecting this pad to ground. The is internal connection. 3 Ground (GND) 4 Output The outputs must be terminated, 100 ohms between the outputs is the ideal termination. Capacitor coupled terminations can be used. 5 Output* 6 Supply Voltage (V CC) Recommend connecting appropriate power supply bypass capacitors as close as possible. |
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