3

MX25U4035

MX25U8035

P/N: PM1394

REV. 1.0, MAR. 09, 2009

(20) Enter Secured OTP (ENSO) ........................................................................................................................... 26

(21) Exit Secured OTP (EXSO) .............................................................................................................................. 26

(22) Read Security Register (RDSCUR)................................................................................................................. 26

Table 8. Security Register Definition....................................................................................................................... 27

(23) Write Security Register (WRSCUR) ................................................................................................................ 27

(24) HOLD# pin function enable (HDE) .................................................................................................................. 27

POWER-ON STATE ...................................................................................................................................................28

ELECTRICAL SPECIFICATIONS..............................................................................................................................29

ABSOLUTE MAXIMUM RATINGS ......................................................................................................................... 29

Figure 2.Maximum Negative Overshoot Waveform................................................................................................ 29

CAPACITANCE TA = 25°C, f = 1.0 MHz ................................................................................................................. 29

Figure 3. Maximum Positive Overshoot Waveform................................................................................................. 29

Figure 4. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL .................................................................. 30

Figure 5. OUTPUT LOADING................................................................................................................................ 30

Table 9. DC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 1.65V ~ 2.0V) .................................... 31

Table 10. AC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 1.65V ~ 2.0V) .................................. 32

Timing Analysis ........................................................................................................................................................34

Figure 6. Serial Input Timing................................................................................................................................... 34

Figure 7. Output Timing .......................................................................................................................................... 34

Figure 8. WP# Setup Timing and Hold Timing during WRSR when SRWD=1 ....................................................... 35

Figure 9. Hardware Reset Timing........................................................................................................................... 35

Figure 10. Write Enable (WREN) Sequence (Command 06) ................................................................................. 36

Figure 11. Write Disable (WRDI) Sequence (Command 04) .................................................................................. 36

Figure 12. Read Identification (RDID) Sequence (Command 9F) .......................................................................... 36

Figure 13. Read Status Register (RDSR) Sequence (Command 05)..................................................................... 37

Figure 14. Write Status Register (WRSR) Sequence (Command 01) ................................................................... 37

Figure 15. Read Data Bytes (READ) Sequence (Command 03)........................................................................... 37

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B)....................................................... 38

Figure 17. 2 x I/O Read Mode Sequence (Command BB) ..................................................................................... 39

Figure 18. 4 x I/O Read Mode Sequence (Command EB) ..................................................................................... 39

Figure 19. 4 x I/O Read enhance performance Mode Sequence (Command EB) ................................................. 40

Figure 20. Page Program (PP) Sequence (Command 02).................................................................................... 41

Figure 21. 4 x I/O Page Program (4PP) Sequence (Command 38) ...................................................................... 41

Figure 22. Continously Program (CP) Mode Sequence with Hardware Detection (Command AD) ....................... 42

Figure 23. Sector Erase (SE) Sequence (Command 20) ...................................................................................... 42

Figure 24. Block Erase 32KB (BE32K) Sequence (Command 52)........................................................................ 43

Figure 25. Block Erase (BE) Sequence (Command D8) ....................................................................................... 43

Figure 26. Chip Erase (CE) Sequence (Command 60 or C7) ............................................................................... 43

Figure 27. Deep Power-down (DP) Sequence (Command B9)............................................................................. 44

Figure 28. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB) .. 44