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MX25V4035 Datasheet(PDF) 5 Page - Macronix International |
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MX25V4035 Datasheet(HTML) 5 Page - Macronix International |
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5 / 54 page  5 MX25V4035 MX25V8035 P/N: PM1468 REV. 0.01, FEB. 13, 2009 ADVANCED INFORMATION 4M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH 8M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 4M: 4,194,304 x 1 bit structure or 2,097,152 x 2 bits (two I/O read mode) structure or 1,048,576 x 4 bits (four I/ O read mode) structure 8M: 8,388,608 x 1 bit structure or 4,194,304 x 2 bits (two I/O read mode) structure or 2,097,152 x 4 bits (four I/ O read mode) structure • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Single Power Supply Operation - 2.25 to 2.75 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance - Fast read - 1 I/O: 66MHz with 8 dummy cycles (30pF+1TTL Load) - 2 I/O: 50MHz with 4 dummy cycles (30pF+1TTL Load), equivalent to 100MHz - 4 I/O: 50MHz with 6 dummy cycles (30pF+1TTL Load), equivalent to 200MHz - Fast program time: 1.7ms(typ.) and 6ms(max.)/page (256-byte per page) - Byte program time: 15us (typical) - Continuously program mode (automatically increase address under word program mode) - Fast erase time: 80ms (typ.)/sector (4K-byte per sector); 0.6s(typ.) /block (32K-byte per block); 1s(typ.) /block (64K-byte per block); 7.5s(typ.) /chip for 4M; 13s(typ.) /chip for 8M • Low Power Consumption - Low active read current: 12mA(max.) at 66MHz, 6mA(max.) at 50MHz - Low active erase/programming current: 15mA (typ.) - Low standby current: 5uA (max.) • Deep Power Down: 5uA(max.) • Minimum 100,000 erase/program cycles • 10 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instruc- tions - Additional 512-bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector or block - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first) • Status Register Feature • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID |
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