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BQ4015MS-85N Datasheet(PDF) 9 Page - Texas Instruments

Part # BQ4015MS-85N
Description  512Kx8 Nonvolatile SRAM
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

BQ4015MS-85N Datasheet(HTML) 9 Page - Texas Instruments

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bq4015/Y
Power-Down/Power-Up Cycle (TA = TOPR)
Symbol
Parameter
Minimum
Typical
Maximum
Unit
Conditions
tPF
VCC slew, 4.75 to 4.25 V
300
-
-
µs
tFS
VCC slew, 4.25 to VSO
10
-
-
µs
tPU
VCC slew, VSO to VPFD (max.)
0
-
-
µs
t
CER
Chip enable recovery time
40
80
120
ms
Time during which
SRAM is write-protected
after VCC passes VPFD on
power-up.
tDR
Data-retention time in
absence of VCC
10
-
-
years
TA = 25°C. (2)
tWPT
Write-protect time
40
100
150
µs
Delay after VCC slews
down past VPFD before
SRAM is write-
protected.
Notes:
1.
Typical values indicate operation at TA = 25°C, VCC = 5V.
2.
Batteries are disconnected from circuit until after VCC is applied for the first time. tDR is the
accumulated time in absence of power beginning when power is first applied to the device.
Caution:
Negative undershoots below the absolute maximum rating of -0.3V in battery-backup mode
may affect data integrity.
Power-Down/Power-Up Timing


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