CD74FCT824AEN datasheet(5/7 Pages) TI

Part #	CD74FCT824AEN

Description	BiCMOS FCT Interface Logic, 9-Bit D-Type Flip-Flops, Three-State

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Manufacturer	TI [Texas Instruments]

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5 / 7 page

8-5

CD74FCT823A, CD74FCT824A

Test Circuits and Waveforms

NOTE:

9. Pulse Generator for All Pulses: Rate

≤ 1.0MHz; ZOUT ≤ 50Ω;

tf, tr ≤ 2.5ns.

FIGURE 1. TEST CIRCUIT

FIGURE 2. SETUP, HOLD, AND RELEASE TIMING

FIGURE 3. PULSE WIDTH

FIGURE 4. ENABLE AND DISABLE TIMING

FIGURE 5. PROPAGATION DELAY

3V

0

DUT

PULSE ZO

GEN

7V

500

Ω

50pF

500

Ω

VCC

RT

RT = ZO

V0

CL

RL

VI

tr, tf = 2.5ns

(NOTE 9)

SWITCH POSITION

TEST

SWITCH

tPLZ, tPZL, Open Drain

Closed

tPHZ, tPZH, tPLH, tPHL

Open

DEFINITIONS:

CL = Load capacitance, includes jig and probe

capacitance.

RT = Termination resistance, should be equal to ZOUT of

the Pulse Generator.

VIN = 0V to 3V.

Input: tr =tf = 2.5ns (10% to 90%), unless otherwise specified

ASYNCHRONOUS CONTROL

tH

tSH

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

tH

tSH

PRESET CLEAR

CLOCK ENABLE

ETC.

SYNCHRONOUS CONTROL

tREM

DATA

INPUT

TIMING

INPUT

tW

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

1.5V

3V

1.5V

0V

CONTROL INPUT

OUTPUT

NORMALLY LOW

OUTPUT

NORMALLY HIGH

SWITCH

OPEN

tPZL

3.5V

1.5V

0V

tPLZ

tPHZ

tPZH

0V

3.5V

0.3V

VOL

VOH

SWITCH

CLOSED

ENABLE

DISABLE

1.5V

3V

0V

1.5V

3V

0V

tPLH

SAME PHASE

INPUT TRANSITION

tPHL

tPLH

tPHL

OPPOSITE PHASE

INPUT TRANSITION

OUTPUT

1.5V

VOH

VOL

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