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CD74HCT237E Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HCT237E Datasheet(HTML) 1 Page - Texas Instruments |
1 / 10 page 1 Data sheet acquired from Harris Semiconductor SCHS146 Features • Select One of Eight Data Outputs - Active Low for CD74HC137 and CD74HCT137 - Active High for CD74HC237 and CD74HCT237 • l/O Port or Memory Selector • Two Enable Inputs to Simplify Cascading • Typical Propagation Delay of 13ns at VCC = 5V, 15pF, TA = 25 oC (CD74HC237) • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%, of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Pinout CD74HC137, CD74HCT137, CD74HC237, CD74HCT237 (PDIP, SOIC) TOP VIEW 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 A0 A1 A3 LE OE1 OE0 GND Y7 VCC Y1 Y2 Y3 Y4 Y5 Y6 Y0 March 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 File Number 1886.1 CD74HC137, CD74HCT137, CD74HC237, CD74HCT237 High Speed CMOS Logic, 3-to-8 Line Decoder Demultiplexer with Address Latches [ /Title (CD74 HC137 , CD74 HCT13 7, CD74 HC237 , CD74 HCT23 7) /Sub- ject (High Speed |
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