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PCA8550DB Datasheet(PDF) 3 Page - Texas Instruments |
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PCA8550DB Datasheet(HTML) 3 Page - Texas Instruments |
3 / 8 page PCA8550 NONVOLATILE 5-BIT REGISTER WITH I2C INTERFACE SCPS050A – MARCH 1999 – REVISED APRIL 1999 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I2C interface I2C communication with this device is initiated by a master sending a start condition, a high-to-low transition on the serial data (SDA) input/output while the serial clock (SCL) input is high. After the start condition, the device address byte is sent, MSB first, including the data-direction bit (R/W). This device does not respond to the general call address. After receiving the valid address byte, this device responds with an acknowledge, a low on the SDA input/output during the high of the acknowledge-related clock pulse. The data byte follows the address acknowledge. If the R/W bit is high, the data from this device are the values read from the nonvolatile register. If the R/W bit is low, the data are from the master, to be written into the register. A valid data byte is one in which the three high-order bits are low. The first valid data byte that is received is written into the register, following the stop condition. If an invalid data byte is received, it is acknowledged, but is not written into the register. The data byte is followed by an acknowledge sent from this device. If other data bytes are sent from the master following the acknowledge, they are ignored by this device. A stop condition, a low-to-high transition on the SDA input/output while the SCL input is high, is sent by the master. If the WP input is low during the falling edge of the first valid data byte acknowledge on the SCL input and the R/W bit is low, the stop condition causes the I2C interface logic to write the data byte value into the nonvolatile register. Data are written only if complete bytes are received and acknowledged. Writing to the register takes time (twr), during which the device does not respond to its slave address. If the WP input is high, the I2C interface logic does not write to the register. I2C INTERFACE DEFINITION TABLE BYTE BIT BYTE 7 (MSB) 6 5 4 3 2 1 0 (LSB) Address H L L H H H L R/W Data L L L NON- MUXED OUT MUX OUT D MUX OUT C MUX OUT B MUX OUT A absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC –0.5 V to 6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (see Note 1) –0.5 V to 6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO (SDA) (see Note 1) –0.5 V to 6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO (MUX OUT outputs) (see Note 1) –0.5 V to 2.9 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO (NON-MUXED OUT output) (see Notes 1 and 2) –0.5 V to VCC + 0.5 V . . . . . . . . . Input clamp current, IIK (VI < 0 ) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 2) –50 mA, +10 mA . . . . . . . . . . . . . . . . . . . . . . . . Input/output clamp current, IOK (VO < 0) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous output current, IO (VO = 0 to VCC) (see Note 2) ±15 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous current through VCC or GND ±30 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 3): D package 113 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DB package 131 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PW package 149 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51. |
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